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S25FL128SDPMFIF Datasheet(PDF) 8 Page - Cypress Semiconductor |
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S25FL128SDPMFIF Datasheet(HTML) 8 Page - Cypress Semiconductor |
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8 / 149 page ![]() Document Number: 001-98283 Rev. *M Page 7 of 148 S25FL128S/S25FL256S 1.3 Glossary 1.4 Other Resources 1.4.1 Cypress Flash Memory Roadmap www.cypress.com/product-roadmaps/cypress-flash-memory-roadmap 1.4.2 Links to Software www.cypress.com/software-and-drivers-cypress-flash-memory 1.4.3 Links to Application Notes www.cypress.com/appnotes Command All information transferred between the host system and memory during one period while CS# is low. This includes the instruction (sometimes called an operation code or opcode) and any required address, mode bits, latency cycles, or data. DDP (Dual Die Package) Two die stacked within the same package to increase the memory capacity of a single package. Often also referred to as a Multi-Chip Package (MCP) DDR (Double Data Rate) When input and output are latched on every edge of SCK. ECC ECC Unit = 16 byte aligned and length data groups in the main Flash array and OTP array, each of which has its own hidden ECC syndrome to enable error correction on each group. Flash The name for a type of Electrical Erase Programmable Read Only Memory (EEPROM) that erases large blocks of memory bits in parallel, making the erase operation much faster than early EEPROM. High A signal voltage level ≥ VIH or a logic level representing a binary one (1). Instruction The 8 bit code indicating the function to be performed by a command (sometimes called an operation code or opcode). The instruction is always the first 8 bits transferred from host system to the memory in any command. Low A signal voltage level VIL or a logic level representing a binary zero (0). LSB (Least Significant Bit) Generally the right most bit, with the lowest order of magnitude value, within a group of bits of a register or data value. MSB (Most Significant Bit) Generally the left most bit, with the highest order of magnitude value, within a group of bits of a register or data value. Non-Volatile No power is needed to maintain data stored in the memory. OPN (Ordering Part Number) The alphanumeric string specifying the memory device type, density, package, factory non-volatile configuration, etc. used to select the desired device. Page 512 bytes or 256 bytes aligned and length group of data. The size assigned for a page depends on the Ordering Part Number. PCB Printed Circuit Board PPAP Production Part Approval Process Register Bit References Are in the format: Register_name[bit_number] or Register_name[bit_range_MSB: bit_range_LSB] SDR (Single Data Rate) When input is latched on the rising edge and output on the falling edge of SCK. Sector Erase unit size; depending on device model and sector location this may be 4 kbytes, 64 kbytes or 256 kbytes. Write An operation that changes data within volatile or non-volatile registers bits or non-volatile flash memory. When changing non-volatile data, an erase and reprogramming of any unchanged non-volatile data is done, as part of the operation, such that the non-volatile data is modified by the write operation, in the same way that volatile data is modified – as a single operation. The non-volatile data appears to the host system to be updated by the single write command, without the need for separate commands for erase and reprogram of adjacent, but unaffected data. |
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