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TL4242 Datasheet(PDF) 4 Page - Texas Instruments |
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TL4242 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 26 page ![]() Not to scale 1 PWM 8 I 2 ST 7 NC 3 GND 6 Q 4 REF 5 D Not to scale Thermal Pad 4 TL4242-Q1 SLVS732G – JULY 2010 – REVISED APRIL 2017 www.ti.com Product Folder Links: TL4242-Q1 Submit Documentation Feedback Copyright © 2010–2017, Texas Instruments Incorporated 5 Pin Configuration and Functions DRJ Package 8-Pin WSON With Exposed Thermal Pad Top View KTT Package 7-Pin TO-263 With Exposed Thermal Pad Top View Pin Functions PIN I/O DESCRIPTION NAME NO. DRJ KTT D 5 6 I Status delay. To set status reaction delay, connect to GND with a capacitor. For no delay, leave open. GND 3 4 — Ground I 8 1 I Input. Connect directly to GND as close as possible to the device with a 100-nF ceramic capacitor. NC 7 — — No internal connection PWM 1 2 I Pulse-width modulation input. If not used, connect to the I pin. Q 6 7 O Output REF 4 5 I Reference input. Connect to a shunt resistor. ST 2 3 O Status output. Open-collector output. Connect to an external pullup resistor (RPULLUP ≥ 4.7 k Ω). Thermal pad — — — Solder the thermal pad directly to the PCB. Connect to ground or leave floating. |
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