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PIC16F570 Datasheet(PDF) 74 Page - Microchip Technology |
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PIC16F570 Datasheet(HTML) 74 Page - Microchip Technology |
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74 / 134 page  PIC16F527 DS40001652C-page 74 2012-2014 Microchip Technology Inc. IORWF Inclusive OR W with f Syntax: [ label ] IORWF f,d Operands: 0 f 31 d [0,1] Operation: (W).OR. (f) (dest) Status Affected: Z Description: Inclusive OR the W register with register ‘f’. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘f’. MOVF Move f Syntax: [ label ] MOVF f,d Operands: 0 f 31 d [0,1] Operation: (f) (dest) Status Affected: Z Description: The contents of register ‘f’ are moved to destination ‘d’. If ‘d’ is ‘0’, destination is the W register. If ‘d’ is ‘1’, the destination is file register ‘f’. ‘d’ = 1 is useful as a test of a file register, since status flag Z is affected. MOVLB Move Literal to BSR Syntax: [ label ] MOVLB k Operands: 0 k 7 Operation: k (BSR) Status Affected: None Description: The 3-bit literal ‘k’ is loaded into the BSR register. MOVLW Move Literal to W Syntax: [ label ] MOVLW k Operands: 0 k 255 Operation: k (W) Status Affected: None Description: The 8-bit literal ‘k’ is loaded into the W register. The “don’t cares” will assembled as ‘0’s. MOVWF Move W to f Syntax: [ label ] MOVWF f Operands: 0 f 31 Operation: (W) (f) Status Affected: None Description: Move data from the W register to register ‘f’. NOP No Operation Syntax: [ label ] NOP Operands: None Operation: No operation Status Affected: None Description: No operation. OPTION Load OPTION Register Syntax: [ label ] OPTION Operands: None Operation: (W) OPTION Status Affected: None Description: The content of the W register is loaded into the OPTION register. RETFIE Return From Interrupt Syntax: [ label ] RETFIE Operands: None Operation: TOS PC 1 GIE Status Affected: None Description: The program counter is loaded from the top of the stack (the return address). GIE bit of INTCON0 is set. This is a 2-cycle instruction. |
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