UCC3973 datasheet(14/26 Pages) TI2

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UCC1972/3

UCC2972/3

UCC3972/3

Normal Startup

In practice, the lamp will typically strike in much less than

1 second (usually within the first few cycles) and the volt-

age at the transformer voltage will collapse to below the

open lamp trip level. Difficulty in striking the lamp usually

results from one or a combination of the following:

Insufficient transformer turns ratio or input voltage.

Increase in required striking voltage at cold

temperature.

The lamp has set for a long period of time.

Transformer secondary voltage is reduced due to

voltage division between parasitic secondary

capacitance and the ballast capacitor.

Setting the Open Lamp Trip Level

The buck voltage is monitored by an internal 7V com-

parator to detect an open lamp. The actual trip voltage

across the resonant tank is set with an external resistor

divider R10 and R11.

V PEAK

OPENLAMP

BUCK

÷ ·

–

(18)

R10 and R11 should be in the 1k

W-5kW range, to guar-

antee sharp zero crossing edges at the buck pin of the

IC. In most applications the peak clamp voltage would be

set to a higher level than the open lamp trip voltage, en-

suring the converter would shut down after the one sec-

ond blank time if a true open lamp existed. If the open

lamp voltage is increased, the peak clamp circuit voltage

(equation 16) would need to be increased accordingly. A

peak VBAT-Vbuck voltage of 10.5V has been set for

open lamp detection in this example. (R10 = 2k,

R11 = 1k).

Voltage Regulator

The UCC3972/3 controller contains an internal 18V shunt

regulator that provides a 5% accurate voltage clamp for

the MOSFET gate drive while allowing the controller to

operate in applications with input voltages up to 25V.

Since only the VBAT and BUCK pins are rated for 25V,

the shunt regulator limits the voltage on the VDD and

OUT pins to 18V. The MODE, CS, and COMP pin volt-

ages are typically less than 5V. If the UCC3972/3 is to be

used in an application with input voltages greater than

18V, a resistor from VBAT to VDD is required to limit the

current into the VDD pin. The resistor should be sized to

allow sufficient current to operate the controller and drive

the external MOSFET gate, while minimizing the voltage

drop across the resistor. A bypass capacitor should be

connected at the VDD pin to provide a constant operat-

ing voltage.

Selecting the Shunt Resistor:

The first step in selecting the shunt resistor is to deter-

mine the current requirements for the application. With a

100kHz switching frequency and a maximum gate

charge of 11nC for the IRFL014 , the gate drive circuit re-

quires 1.1mA of average current. The UCC3972/3 re-

quires an additional maximum quiescent current of

1.5mA. The shunt resistor must therefore supply 2.6mA

of current over the operating voltage of the part.

The application’s maximum input voltage is 22V. With a

regulator clamp voltage of 18V, the maximum value for

the shunt resistor becomes 1.5k

W [(22-18)V/2.6mA]. This

resistor will minimize losses at maximum input voltage,

but could produce a 4V drop (from VBAT to VDD) even

when the regulator is not clamped. This drop reduces the

available gate drive voltage, leaving only 6V with the

minimum input voltage of 10V. Since the efficiency of the

shunt regulator is not of primary importance when the

charger is running, a smaller value of shunt resistor is se-

lected to improve the available gate drive voltage. A

470

W shunt resistor will produce a maximum 1.2V drop

from VBAT to VDD when the shunt regulator is not

clamped. When the regulator is clamped at 18V and the

charger voltage is at its maximum of 22V, the power

across the shunt resistor will be 35mW [(4V x 4V)/470].

APPLICATION INFORMATION (cont.)

Figure 9. VBUCK and MODE pin voltages during an open

lamp fault start-up.

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