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DRIVING CAPACITIVE LOADS

1/2

OPA2890

50W

750W

375W

261W

57.6W

Source

+5V

-5V

50W

0.1 F

6.8 F

0.1 F

6.8 F

Load

= 2V/V

DISTORTION PERFORMANCE

OPA2890

SBOS364A – DECEMBER 2007 – REVISED DECEMBER 2007

discussed in the previous section. The amplifier

Combining

this

resistance

parallel

with

the

output, however, now sees the 100

Ω feedback

feedback resistor gives the RB = 261Ω used in this

resistor in parallel with the external load. In general,

example. To reduce the additional high-frequency

the feedback resistor should be limited to the 200

Ω to

noise introduced by this resistor, it is sometimes

1.5k

Ω range. In this case, it is preferable to increase

bypassed with a capacitor. As long as RB < 350Ω, the

both the RF and RG values (see Figure 56), and then

capacitor is not required because the total noise

achieve the input matching impedance with a third

contribution of all other terms is less than that of the

resistor (RM) to ground. The total input impedance

op amp input noise voltage. As a minimum, the

becomes the parallel combination of RG and RM.

OPA2890 requires an RB value of 50Ω to damp out

parasitic-induced peaking—a direct short to ground

on the noninverting input runs the risk of a very

high-frequency instability in the input stage.

One of the most demanding and yet very common

load conditions for an op amp is capacitive loading.

Often, the capacitive load is the input of an

ADC—including additional external capacitance that

may be recommended to improve ADC linearity. A

high-speed, high open-loop gain amplifier such as the

OPA2890 can be very susceptible to decreased

stability and closed-loop response peaking when a

capacitive load is placed directly on the output pin.

When the open-loop output resistance of the amplifier

is considered, this capacitive load introduces an

additional pole in the signal path that can decrease

the phase margin. Several external solutions to this

problem have been suggested. When the primary

considerations

are

frequency

response

flatness,

pulse response fidelity, and/or distortion, the simplest

and most effective solution is to isolate the capacitive

Figure 59. Gain of –2V/V Example Circuit

load

from

the

feedback

loop

inserting

series-isolation resistor between the amplifier output

and the capacitive load. This solution does not

The second major consideration, touched on in the

eliminate the pole from the loop response, but rather

paragraph,

that

the

signal

source

shifts it and adds a zero at a higher frequency. The

impedance becomes part of the noise gain equation

additional zero acts to cancel the phase lag from the

and influences the bandwidth. For the example in

capacitive load pole, thus increasing the phase

Figure 59, the RM value combined in parallel with the

margin and improving stability.

external 50

Ω source impedance yields an effective

driving impedance of 50

Ω || 57.6Ω = 26.7Ω. This

The Typical Characteristics show the recommended

impedance is added in series with RG for calculating

RS versus capacitive load (see Figure 15 and

the noise gain (NG). The resultant NG is 2.86V/V for

Figure 36) and the resulting frequency response at

Figure 59, as opposed to only 2V/V if RM could be

the load. Parasitic capacitive loads greater than 2pF

eliminated

discussed

above.

Therefore,

the

can begin to degrade the performance of the

bandwidth is slightly lower for the gain of –2V/V

OPA2890. Long PCB traces, unmatched cables, and

circuit of Figure 59 than for the gain of +2V/V circuit

connections to multiple devices can easily exceed

of Figure 49.

this value. Always consider this effect carefully, and

add the recommended series resistor as close as

The third important consideration in inverting amplifier

possible to the OPA2890 output pin (see the Board

design is setting the bias current cancellation resistor

Layout Guidelines section).

on the noninverting input (RB). If this resistor is set

equal to the total dc resistance looking out of the

inverting node, the output dc error (as a result of the

input bias currents) is reduced to [(Input Offset

The OPA2890 provides good distortion performance

Current)

× R

F].

If the 50

Ω source impedance is

into a 100

Ω load on ±5V supplies. Relative to

DC-coupled in Figure 57, the total resistance to

alternative

solutions,

provides

exceptional

ground on the inverting input is 402

Ω.

performance into lighter loads and/or operating on a

single +5V supply. Generally, until the fundamental

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