OPA690 datasheet(26/35 Pages) TI

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P =10V

2.5mA+2[5 /(4

(75

||1.5k ))]=200mW

MaximumT =+85 C+(0.2W

125 C/W)=110 C

THERMAL ANALYSIS

OPA2890

SBOS364A – DECEMBER 2007 – REVISED DECEMBER 2007

In normal operation, base current to Q1 is provided

Operating junction temperature (TJ) is given by TA +

through the 2M

Ω resistor, while the emitter current

PD × θJA. The total internal power dissipation (PD) is

through the 50k

Ω resistor sets up a voltage drop that

the sum of quiescent power (PDQ) and additional

is inadequate to turn on the two diodes in the Q1

power dissipated in the output stage (PDL) to deliver

emitter. As VDIS is pulled LOW, additional current is

load power. Quiescent power is simply the specified

pulled through the 50k

Ω resistor, eventually turning

no-load supply current times the total supply voltage

on those two diodes (

≈30µA). At this point, any

across the part. PDL depends on the required output

further current pulled out of VDIS goes through those

signal and load; for a grounded resistive load, PDL is

diodes holding the emitter-base voltage of Q1 at

at a maximum when the output is fixed at a voltage

approximately 0V. This current shuts off the collector

equal to 1/2 of either supply voltage (for equal bipolar

current out of Q1, turning the amplifier off. The supply

supplies). Under this condition, PDL = VS

2/(4

× R

L),

currents in the disable mode are only those required

where RL includes feedback network loading.

to operate the circuit of Figure 62. Additional circuitry

Note that it is the power in the output stage and not

ensures that turn-on time occurs faster than turn-off

into

the

load

that

determines

internal

power

time (make-before-break).

dissipation.

When disabled, the output and input nodes go to a

As a worst-case example, compute the maximum TJ

high-impedance state. If the OPA2890 is operating at

using an OPA2890ID (SO-8 package) in the circuit of

a gain of +1V/V, the device shows a very high

Figure 49 operating at the maximum specified

impedance at the output and exceptional signal

ambient temperature of +85

°C and with both outputs

isolation. If operating at a gain greater than +1V/V,

driving a grounded 20

Ω load to +2.5V.

the total feedback network resistance (RF + RG)

appears as the impedance looking back into the

output, but the circuit still shows very high forward

and reverse isolation. If configured as an inverting

amplifier, the input and output are connected through

the feedback network resistance (RF + RG) and the

This absolute worst-case condition does not exceed

isolation is very poor as a result.

the specified maximum junction temperature. Actual

PDL is normally less than that considered here.

Carefully consider maximum TJ in your application.

Maximum desired junction temperature sets the

maximum allowed internal power dissipation as

described below. In no case should the maximum

junction temperature be allowed to exceed +150

°C.

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