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TPS40222DRPR Datasheet(PDF) 13 Page - Texas Instruments |
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TPS40222DRPR Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 28 page ![]() www.ti.com Capacitor Selection 1 2 L O I O 2 v 1 2 C O V OS 2 * VO 2 (6) C MIN + I O Dt D V OUT + 6.1 mF (7) TPS40222 SLUS642A – OCTOBER 2005 – REVISED JANUARY 2006 One constraint on the capacitance is the overshoot allowed by a sudden load change. The worst case for a transient load release occurs at the time when the inductor has just finished a tON pulse. At this point, the inductor is operating at maximum current. When the output load is suddenly removed, all of the inductor current must be absorbed by the output capacitance. With a typical output voltage overshoot requirement of 2% at 3.3-V, the minimum capacitance required to remain in specification is calculated using Equation 6. where • V OS is the maximum overshoot voltage • L O = 2.2 µH • I O = 1.5 A • V O = 3.3 V Solving this relationship, the minimum required output capacitance CO is 11-µF. The other load transition extreme is from no load to full load that occurs just after a minimum on-time cycle has started. At this point, the controller has to support this load for the remainder of the cycle with a minimum of current available from the inductor. In this example, the minimum on-time with a 3.3-V output is 528 ns and the off-time is 800 ns minus 528 ns = 272 ns. Using the relationship shown in Equation 7; where • ∆V OUT is a 2% specified output voltage droop • I O = 1.5 A • ∆t = 272 ns Ceramic capacitors with a low ESR are used to achieve the lowest voltage ripple. For example, current 1206, 6.3-V capacitors that provide 22 µF and an ESR of 2 mΩ are available. 13 |
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