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RT8230A Datasheet(PDF) 13 Page - Richtek Technology Corporation |
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RT8230A Datasheet(HTML) 13 Page - Richtek Technology Corporation |
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13 / 18 page ![]() RT8237E 13 DS8237E-02 October 2020 www.richtek.com © Copyright 2020 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. the next “ON” cycle. The on-time is kept the same as that in heavy load condition. On the contrary, when the output current increases from light load to heavy load, the switching frequency increases to the preset value as the inductor current reaches the continuous condition. This is shown in Figure 1. The transition load point to the light load operation is calculated as follows : IN OUT LOAD ON VV It 2L where tON is the on-time. Figure 1. Boundary Condition of CCM/DCM The switching waveforms may appear noisy and asynchronous when light loading causes diode-emulation operation, but this is a normal operating condition that results in high light load efficiency. Trade-offs in DEM noise vs. light load efficiency is made by varying the inductor value. Generally, low inductor values produce a broader efficiency vs. load curve, while higher values result in higher full load efficiency (assuming that the coil resistance remains fixed) and less output voltage ripple. The disadvantages for using higher inductor values include larger physical size and degraded load transient response (especially at low input voltage levels). Forced-CCM Mode (FCCM) The low noise, forced-CCM mode disables the zero- crossing comparator, which controls the low-side switch on-time. This causes the low-side gate drive waveform to become the complement of the high-side gate drive waveform. This in turn causes the inductor current to reverse at light loads as the PWM loop to maintain duty ratio VOUT/VIN. A fairly constant switching frequency is the benefit of forced-CCM mode, but this comes at a cost. The no load battery current can be up to 10mA to 40mA, depending on the external MOSFETs. Current Limit Setting (CS) The RT8237E has a cycle-by-cycle current limit control. The current limit circuit employs a unique “valley” current sensing algorithm. If the magnitude of the current sense signal at PHASE is above the current limit threshold, the PWM is not allowed to initiate a new cycle (see Figure 2). In order to provide both good accuracy and a cost effective solution, the RT8237E supports temperature compensated MOSFET RDS(ON) sensing. The CS pin of the RT8237E is a multiplexed pin for PWM enable/disable control and current limit threshold setting. Connect a setting resistor from this pin to GND via an N- MOSFET. When the N-MOSFET is turned off, the PWM is disabled. When the N-MOSFET is turned on, the PWM is enabled and the current limit threshold is equal to 1/8 of the voltage at this pin. Choose a current limit resistor by following below equation: RIPPLE LOAD_OC DS(ON) CS_OC OC_SET CS CS I I8 R V 2 R II Inductor current is monitored by the voltage between the GND and PHASE pins, so the PHASE pin should be connected to the Drain terminal of the low-side MOSFET. ICS has a temperature coefficient to compensate the temperature dependency of the RDS(ON). GND is used as the positive current sensing node, so GND should be connected to the Source terminal of the low-side MOSFET. As the comparison is being done during the OFF state, VLIMIT (current limit threshold) sets the valley level of the inductor current. Thus, the load current at over current threshold, ILOAD_OC, can be calculated as follows : CS_OC RIPPLE LOAD_OC DS(ON) CS_OC IN OUT OUT DS(ON) IN V I I = + 8R 2 V (V V ) V 1 = + 8R 2 L f V IL t 0 tON Slope = (VIN -VOUT) / L IL, PEAK ILOAD = IL, PEAK / 2 |
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