SID1132K datasheet(4/24 Pages) POWERINT

4 / 24 page

Rev. H 09/19

SID11x2K

www.power.com

Figure 9. Short-Circuit Protection using a Resistor Chain R

VCEX.

Figure 7.

Turn-Off Peak Output Current (Sink) vs. Ambient Temperature.

Conditions: VVCC = 5 V, V

TOT = 25 V, fS = 20 kHz, Duty Cycle = 50%

Figure 8. Turn-On and Turn-Off Peak Output Current vs. Secondary-Side Total

Supply Voltage (V

TOT). Conditions: VVCC = 5 V, TJ = 25 °C, RGH = 4 W,

RGL = 3.4 W, CLOAD = 100 nF, fS = 1 kHz, Duty Cycle = 50%.

-60 -40

-20

100 120 140

Ambient Temperature (°C)

-1

-2

-3

-4

-5

-6

-7

-8

-9

-10

RGH = 4 Ω, RGL = 3.4 Ω, CLOAD = 47 nF

RGH = 4 Ω, RGL = 3.4 Ω, CLOAD = 100 nF

RGH = RGL = 0 Ω, CLOAD = 47 nF

Secondary-Side Total Supply Voltage – VTOT (V)

IGH, Turn-On Peak Gate Current

IGL, Turn-Off Peak Gate Current

that can be achieved for a given supply voltage for same gate resistor

values, load capacitance and layout design.

Short-Circuit Protection

The SCALE-iDriver uses the semiconductor desaturation effect to

detect short-circuits and protects the device against damage by

employing an Advanced Soft Shut Down (ASSD) technique. Desatu-

ration can be detected using two different circuits, either with diode

sense circuitry D

VCE (Figure 10) or with resistors RVCEX (Figure 9). With

the help of a well stabilized V

VISO and a Schottky diode (DSTO) connected

between semiconductor gate and VISO pin the short-circuit current

value can be limited to a safe value.

During the off-state, the VCE pin is internally connected to the COM

pin and C

RES is discharged (red curve in Figure 11 represents the

potential of the VCE pin). When the power semiconductor switch

receives a turn-on command, the collector-emitter voltage (V

CE)

decreases from the off-state level same as the DC-link voltage to a

normally much lower on-state level (see blue curve in Figure 11) and

RES begins to be charged up to the VCE saturation level (VCE SAT). CRES

charging time depends on the resistance of R

VCEX (Figure 9), DC-link

voltage and C

RES and RVCE value. The VCE voltage during on-state is

continuously observed and compared with a reference voltage, V

DES.

The V

DES level is optimized for IGBT applications. As soon as VCE>VDES

(red circle in Figure 11), the driver turns off the power semiconductor

switch with a controlled collector current slope, limiting the V

overvoltage excursions to below the maximum collector-emitter

voltage (V

CES). Turn-on commands during this time and during tSO are

ignored, and the SO pin is connected to GND.

The response time t

RES is the CRES charging time and describes the

delay between V

CE asserting and the voltage on the VCE pin rising

(see Figure 11). Response time should be long enough to avoid false

tripping during semiconductor turn-on and is adjustable via R

RES and

RES (Figure 10) or RVCE and CRES (Figure 9) values. It should not be

longer than the period allowed by the semiconductor manufacturer.

Safe Power-Up and Power-Down

During driver power-up and power-down, several unintended input /

output states may occur. In order to avoid these effects, it is

recommended that the IN pin is kept at logic low during power-up

and power-down. Any supply voltage related to VCC, VISO, VEE and

VGXX pins should be stabilized using ceramic capacitors C

1, CS1X, CS2X,

GXX respectively as shown in Figures 13 and 14. After supply

voltages reach their nominal values, the driver will begin to function

after a time delay t

START.

Short-Pulse Operation

If command signals applied to the IN pin are shorter than the minimum

specified by t

GE(MIN), then SCALE-iDriver output signals, GH and GL

pins, will extend to value t

GE(MIN). The duration of pulses longer than

GE(MIN) will not be changed.

PI-7952-080416

SCALE-iDriver

VCE

VGXX

VISO

RVCEX

RVCE

DSTO

CGXX

RGOFF

Emitter

Collector

RGON

CRES

VEE

COM

Gate RGINT

DCL

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