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TPS54550PWPR Datasheet(PDF) 21 Page - Texas Instruments

Part # TPS54550PWPR
Description  4.5-V TO 20-V INPUT, 6-A OUTPUT SYNCHRONOUS PWM SWITCHER WITH INTEGRATED FET (SWIFT™)
PDF  33 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TPS54550PWPR Datasheet(HTML) 21 Page - Texas Instruments

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ƒ
Z1 +
1
2pR3C6
(19)
ƒ
Z2 +
1
2pR1C8
(20)
ƒ
P1 +
1
2pR5C8
(21)
ƒ
P2 +
1
2pR3C7
(22)
ƒ
INT +
1
2pR1C6
(23)
ƒ
LC +
1
2p LOUTCOUT
(17)
R2 +
R1
0.891
V
OUT *
0.891
(18)
TPS54550
SLVS623A–MARCH 2006–REVISED APRIL 2006
Use
of
the
SWIFT
Designer
Software
is
recommended for designs with unusually high closed
loop crossover frequencies, low value, low ESR
output capacitors such as ceramics, or if the
designer is unsure about the design procedure.
When designing compensation networks for the
TPS54550,
a
number
of
factors
need
to
be
considered. The gain of the compensated error
amplifier should not be limited by the open-loop
Additionally, there is a pole at the origin, which has
amplifier gain characteristics and should not produce
unity gain with the following frequency:
excessive gain at the switching frequency. Also, the
closed loop crossover frequency should be set less
than 1/5 of the switching frequency, and the phase
margin at crossover must be greater than 45
This pole is used to set the overall gain of the
degrees.
The
general
procedure
outlined
here
compensated error amplifier and determines the
produces results consistent with these requirements
closed loop crossover frequency.
without going into great detail about the theory of
There are a number of popular ways to design Type
loop compensation.
3 compensation networks. The theory behind these
First, calculate the output filter LC corner frequency
calculations is beyond the scope of this document. It
using Equation 17:
is always best to to use any calculated compensation
values as the basis for an initial design, and then
verify the actual closed loop response. The initial
values may then be adjusted to suit the individual
design requirements. The SWIFT software design
For the design example, fLC = 4315 Hz.
tool can also be used to provide an intial circuit
design.
The closed loop crossover frequency should be
greater than fLC and less than 1/5 of the switching
In this circuit, the first compensation zero was set at
frequency. Also, the crossover frequency should not
approximately 1/2 the LC corner frequency, with the
exceed 50 kHz, as the error amplifier may not
second zero slightly below that to increase the phase
provide the desired gain. For this design, a crossover
gain prior to the double pole of the LC output filter. At
frequency of 13 kHz was chosen. This value is
the LC corner frequency, the overall phase response
chosen for comparatively wide loop bandwidth while
rapidly drops by 180 degrees, so it is imprtant to
still allowing for adequate phase boost to insure
increase the initial phase of 90 degrees prior to the
stability.
LC corner.
Next, calculate the R2 resistor value for the output
The two compensation poles are set high enough to
voltage of 3.3 V using Equation 18:
to not cause loss of phase margin at the closed loop
cross over and low enough to not cause the error
amplifier gain to exceed the unity gain bandwidth
limit
of
the
internal
operational
amplifier.
The
For any TPS54550 design, start with an R1 value of
integrator frequency is then chosen to set the overall
1.0 k
Ω. R2 is then 374 Ω.
gain and crossover frequency.
Now the values for the compensation components
This
results
in
the
following
pole
and
zero
that set the poles and zeroes of the compensation
frequencies:
network can be calculated. Assuming that R1 > R5
fZ1 = 2340 Hz
and C6 > C7, the pole and zero locations are given
by Equation 19 through Equation 22:
fZ2 = 1591 Hz
blank
fP1 = 120 kHz
blank
fP2 = 159 kHz
blank
fINT = 234 Hz
blank
21
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