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TLC320AC02 Datasheet(PDF) 35 Page - Texas Instruments

Part # TLC320AC02
Description  Single-Supply Analog Interface Circuit
PDF  93 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TLC320AC02 Datasheet(HTML) 35 Page - Texas Instruments

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2–21
The default value of the A-register data is decimal 18 as shown below.
DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
0
01
01
00
0
2.20.3
Register 2 (B Register)
The following command loads DS07 (MSB) – DS00 into the B register.
DS15 DS14 DS13 DS12 DS11 DS10 DS09 DS08 DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
R/W
01
00
0
Register Data
Control Bits
The data in DS07 – DS00 controls the division of FCLK to generate the conversion clock as given in
equation 20:
Conversion frequency
+ FCLK (B register contents)
+
MCLK
2
A register contents
B register contents
(20)
The default value of the B-register data is decimal 18 as shown below.
DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
0
01
01
00
0
2.20.4
Register 3 (A
′ Register)
The following command contains the A
′-register address and loads DS07(MSB) – DS00 into the A′ register.
DS15 DS14 DS13 DS12 DS11 DS10 DS09 DS08 DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
R/W
01
01
0
Register Data
Control Bits
The data in DS07 – DS00 is in 2s-complement format and controls the number of master-clock periods that
the sampling time is shifted.
The default value of the A
′-register data is 0 as shown below.
DS07
DS06 DS05 DS04 DS03 DS02 DS01 DS00
0
00
00
00
0



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