9 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification, and TI

does not warrant its accuracy or completeness. TI’s customers are responsible for determining

suitability of components for their purposes, as well as validating and testing their design

implementation to confirm system functionality.

9.1 Application Information

9.1.1 VDD Transient Rejection

The device has built-in rejection of fast transients on the VDD pin. The rejection of transients depends on both the

duration and the amplitude of the transient. The amplitude of the transient is measured from the bottom of the

transient to the negative threshold voltage of the device, as shown in Figure 9-1.

V

DD

Transient

Amplitude

Duration

V

IT-

tw

Figure 9-1. Voltage Transient Measurement

The device does not respond to transients that are fast duration and low amplitude or long duration and small

amplitude. Transients meeting or longer than the tw specified in the Section 7.6 section triggers a reset.

9.1.2 Reset During Power-Up and Power-Down

The device output is valid when VDD is greater than 1.1 V. When VDD is less than 1.1 V, the output transistor

turns off and becomes high impedance. The voltage on the RESET pin rises to the voltage level connected to

the pullup resistor. Figure 9-2 shows a typical waveform for power-up.

RESET

V

DD

t

d

V

+V

IT

HYS

-

1.1V

ValidOutput

Figure 9-2. Power-Up Response

TLV809

SLVSA03F – JUNE 2010 – REVISED DECEMBER 2020

www.ti.com

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