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CC2541 Datasheet(PDF) 21 Page - Texas Instruments |
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CC2541 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 36 page ![]() RESET WATCHDOG TIMER IRQ CTRL FLASH CTRL DEBUG INTERFACE CLOCK MUX and CALIBRATION DMA 8051 CPU CORE 32-MHz CRYSTAL OSC 32.768-kHz CRYSTAL OSC HIGH- SPEED RC-OSC POWER MANAGEMENT CONTROLLER USART 0 USART 1 TIMER 1 (16-Bit) TIMER 3 (8-Bit) TIMER 4 (8-Bit) TIMER 2 (BLE LL TIMER) FLASH FIFOCTRL 1 KB SRAM SRAM ON-CHIP VOLTAGE REGULATOR POWER-ON RESET BROWN OUT VDD (2 V–3.6 V) DCOUPL RESET_N XOSC_Q2 XOSC_Q1 P2_4 P1_7 P0_7 P2_3 P1_6 P0_6 P2_2 P1_5 P0_5 P1_2 P0_2 P2_1 P1_4 P0_4 P1_1 P0_1 P2_0 P1_3 P0_3 P1_0 P0_0 MODULATOR DEMODULATOR RECEIVE TRANSMIT RF_P RF_N B0301-13 RADIO REGISTERS DS ADC AUDIO/DC AES ENCRYPTION AND DECRYPTION MEMORY ARBITRATOR FLASH UNIFIED SFR IRAM XRAM PDATA SLEEP TIMER 32-kHz RC-OSC DIGITAL ANALOG MIXED ANALOG COMPARATOR Link Layer Engine I C 2 SDA SCL RAM CC2541-Q1 www.ti.com SWRS128 – JUNE 2014 5 Detailed Description 5.1 Functional Block Diagram A block diagram of the CC2541-Q1 is shown in Figure 5-1. The modules can be roughly divided into one of three categories: CPU-related modules; modules related to power, test, and clock distribution; and radio-related modules. In the following subsections, a short description of each module is given. Figure 5-1. CC2541-Q1 Block Diagram 5.2 Block Descriptions A block diagram of the CC2541-Q1 is shown in Figure 5-1. The modules can be roughly divided into one of three categories: CPU-related modules; modules related to power, test, and clock distribution; and radio-related modules. In the following subsections, a short description of each module is given. Copyright © 2014, Texas Instruments Incorporated Detailed Description 21 Submit Documentation Feedback Product Folder Links: CC2541-Q1 |
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