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CDCM1802 Datasheet(PDF) 14 Page - Texas Instruments

Part # CDCM1802
Description  CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output
PDF  30 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

CDCM1802 Datasheet(HTML) 14 Page - Texas Instruments

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ENABLE Yx:
IN
Y:/1
Y:/x
High-Z
High-Z
Undefined
Undefined
Disabled
Enabled
Undivided State is Valid After the First
Positive Transition of the Input Clock
Divider State
ENABLE Yx:
IN
Y:/1
Y:/x
High-Z
High-Z
Undefined
Undefined
Disabled
Enabled
Undivided State is Valid After the First
Positive Transition of the Input Clock
Divider State
14
CDCM1802
SCAS759C – APRIL 2004 – REVISED JULY 2017
www.ti.com
Product Folder Links: CDCM1802
Submit Documentation Feedback
Copyright © 2004–2017, Texas Instruments Incorporated
Figure 13. Signal State After an Output Driver Becomes Enabled While IN = 0
Figure 14. Signal State After an Output Driver Becomes Enabled While IN = 1



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