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ISO5852S Datasheet(PDF) 26 Page - Texas Instruments

Part # ISO5852S
Description  ISO5852S-Q1 High-CMTI 2.5-A and 5-A Reinforced Isolated IGBT, MOSFET Gate Driver With Split Outputs and Active Protection Features
PDF  40 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ISO5852S Datasheet(HTML) 26 Page - Texas Instruments

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10k
10k
0.1µF
µC
15
9 , 16
11
10
12
13
14
IN -
IN +
RDY
10k
10k
VCC1
0.1µF
GND1
2.25V-5.5V
10R
ISO 5852S ± Q1
µC
RST
FLT
15
9 , 16
11
10
12
13
14
10R
2.25V-5.5V
IN -
IN +
RDY
VCC1
GND1
RST
FLT
ISO 5852S ± Q1
Copyright © 2016, Texas Instruments
Incorporated
26
ISO5852S-Q1
SLLSEQ2A – SEPTEMBER 2016 – REVISED DECEMBER 2016
www.ti.com
Product Folder Links: ISO5852S-Q1
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
10.2.2.3 Driving the Control Inputs
The amount of common-mode transient immunity (CMTI) can be curtailed by the capacitive coupling from the
high-voltage output circuit to the low-voltage input side of the ISO5852S-Q1 device. For maximum CMTI
performance, the digital control inputs, IN+ and IN–, must be actively driven by standard CMOS, push-pull drive
circuits. This type of low-impedance signal source provides active drive signals that prevent unwanted switching
of the ISO5852S-Q1 output under extreme common-mode transient conditions. Passive drive circuits, such as
open-drain configurations using pullup resistors, must be avoided. A 20-ns glitch filter exists that can filter a glitch
up to 20 ns on IN+ or IN–.
10.2.2.4 Local Shutdown and Reset
In applications with local shutdown and reset, the FLT output of each gate driver is polled separately, and the
individual reset lines are independently asserted low to reset the motor controller after a fault condition.
Figure 52. Local Shutdown and Reset for Noninverting (left) and Inverting Input Configuration (right)
10.2.2.5 Global-Shutdown and Reset
When configured for inverting operation, the ISO5852S-Q1 device can be configured to shutdown automatically
in the event of a fault condition by tying the FLT output to IN+. For high reliability drives, the open drain FLT
outputs of multiple ISO5852S-Q1 devices can be wired together forming a single, common fault bus for
interfacing directly to the microcontroller. When any of the six gate drivers of a three-phase inverter detects a
fault, the active-low FLT output disables all six gate drivers simultaneously.



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