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LM5109AMA/NOPB Datasheet(PDF) 8 Page - Texas Instruments

Part # LM5109AMA/NOPB
Description  LM5109A High Voltage 1A Peak Half Bridge Gate Driver
PDF  29 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LM5109AMA/NOPB Datasheet(HTML) 8 Page - Texas Instruments

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DRIVER
DRIVER
LEVEL
SHIFT
UVLO
UVLO
HI
VDD
L
I
VSS
HB
HO
HS
LO
HV
VDD
Copyright © 2016, Texas Instruments Incorporated
8
LM5109A
SNVS412C – APRIL 2006 – REVISED SEPTEMBER 2016
www.ti.com
Product Folder Links: LM5109A
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Copyright © 2006–2016, Texas Instruments Incorporated
7 Detailed Description
7.1 Overview
The LM5109A is a cost-effective, high-voltage gate driver designed to drive both the high-side and the low-side
N-channel FETs in a synchronous buck or a half-bridge configuration. The outputs are independently controlled
with TTL compatible input thresholds. The floating high-side driver is capable of working with HB voltage up to
108 V. An external high-voltage diode must be provided to charge high-side gate drive bootstrap capacitor. A
robust level shifter operates at high speed while consuming low power and providing clean level transitions from
the control logic to the high-side gate driver. Undervoltage lockout (UVLO) is provided on both the low-side and
the high-side power rails.
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 Start-Up and UVLO
Both top and bottom drivers include UVLO protection circuitry which monitors the supply voltage (VDD) and
bootstrap capacitor voltage (VHB–HS) independently. The UVLO circuit inhibits the output until sufficient supply
voltage is available to turn on the external MOSFETs, and the built-in UVLO hysteresis prevents chattering
during supply voltage variations. When the supply voltage is applied to the VDD pin of the LM5109A, the top and
bottom gates are held low until VDD exceeds the UVLO threshold, typically about 6.7 V. Any UVLO condition on
the bootstrap capacitor (VHB–HS) will only disable the high-side output (HO).
7.3.2 Level Shift
The level shift circuit is the interface from the high-side input to the high-side driver stage which is referenced to
the switch node (HS). The level shift allows control of the HO output which is referenced to the HS pin and
provides excellent delay matching with the low-side driver.



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