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LMP91051 Datasheet(PDF) 6 Page - Texas Instruments

Part # LMP91051
Description  LMP91051 Configurable AFE for Nondispersive Infrared (NDIR) Sensing Applications
PDF  28 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LMP91051 Datasheet(HTML) 6 Page - Texas Instruments

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LMP91051
SNAS581B – MARCH 2012 – REVISED MAY 2013
www.ti.com
ELECTRICAL CHARACTERISTICS
(1) (continued)
The following specifications apply for VDD = 3.3V, VIO = 3.3V, VCM = 1.15V, Bold values for TA = -40°C to +85°C unless
otherwise specified. All other limits apply to TA = TJ = +25°C.
PARAMETER
TEST CONDITIONS
MIN(2)
TYP(3)
MAX(2)
UNIT
Combined Amplifier Chain Specification
Combination of both current and voltage
en
Input-Referred Noise Density
noise, with a 86k
Ω source impedance at
30
nV
√Hz
5Hz, Gain = 7986
Combination of both current and voltage
Input-Referred Integrated Noise
noise, with a 86k
Ω source impedance
0.1
0.12(4)
µVrms
0.1Hz to 10Hz, Gain = 7986
PGA1 GAIN = 42, PGA2 GAIN = 4
167
PGA1 GAIN = 42, PGA2 GAIN = 8
335
PGA1 GAIN = 42, PGA2 GAIN = 16
669
PGA1 GAIN = 42, PGA2 GAIN = 3
1335
G
Gain
V/V
2 PGA1 GAIN = 250, PGA2 GAIN = 4
1002
PGA1 GAIN = 250, PGA2 GAIN = 8
2004
PGA1 GAIN = 250, PGA2 GAIN = 16
4003
PGA1 GAIN = 250, PGA2 GAIN = 32
7986
GE
Gain Error
Any gain
5
%
Gain = 167 V/V, 335 V/V, 669 V/V, 1335
6
V/V
TCCGE
Gain Temp Coefficient(5)
ppm/°C
Gain = 1002 V/V, 2004 V/V, 4003 V/V,
20
7986V/V
PSRR
Power Supply Rejection Ratio
DC, 3.0V to 3.6V supply, gain = 1002V/V
90
110
dB
1mV input step signal, Gain = 1002,
PhDly
Phase Delay
9
µs
Vout measured at Vdd/2
Phase Delay variation with
1mV input step signal, Gain=1002, Vout
TCPhDly
300
ns
Temperature(6)
measured at Vdd/2
Gain = 167 V/V
70
Gain = 335 V/V
100
Gain = 669 V/V
160
Gain = 1335 V/V
290
Output Offset Voltage Temperature
TCVOS
µV/°C
Drift(5)
Gain = 1002 V/V
230
Gain = 2004 V/V
420
Gain = 4003 V/V
800
Gain = 7986V/V
1550
Common Mode Generator
VDD = 3.3V
1.15
V
VCM
Common Mode Voltage
VDD = 5V
2.59
VCM accuracy
2
%
CLOAD
CMOut Load Capacitance
10
nF
(4)
Guaranteed by design and characterization. Not tested on shipped production material.
(5)
TCCGE and TCVOS are calculated by taking the largest slope between –40°C and 25°C linear interpolation and 25°C and 85°C linear
interpolation.
(6)
TCPhDly is largest change in phase delay between –40°C and 25°C measurements and 25°C and 85°C measurements.
6
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Product Folder Links: LMP91051



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