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LP87622-Q1 Datasheet(PDF) 6 Page - Texas Instruments |
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LP87622-Q1 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 21 page ![]() Table 5-1. Pin Functions (continued) PIN I/O TYPE DESCRIPTION CONNECTION IF NOT USED NO. NAME 8 GPIO4 I/O Digital Primary function: General Purpose Input/Output signal. When configured as an output pin, it can be included as part of the power sequencer output signal to enable an external regulator. Input: Ground, Output: Floating I Digital Alternative programmable function: ENABLE - External power-on control. Ground I Digital Alternative programmable function: TRIG_WDOG - Trigger signal for trigger mode watchdog. Ground — Analog Alternative programmable function: BUCK1_VMON - Voltage monitoring input for BUCK1 regulator. Ground I Digital Alternative programmable function: nSLEEP1 or nSLEEP2, which are the sleep request signals for the device to go to lower power states (Active Low). Ground I Digital Alternative programmable function: WKUP1 or WKUP2, which are the wake- up request signals for the device to go to higher power states. Ground 9 nINT O Digital Open-drain interrupt output, active LOW. Floating 10 GPIO5 I/O Digital Primary function: General Purpose Input/Output signal. When configured as an output pin, it can be included as part of the power sequencer output signal to enable an external regulator. Input: Ground, Output: Floating I Digital Alternative programmable function: SYNCCLKIN - External switching clock input for Buck regulators. Ground O Digital Alternative programmable function: SYNCCLKOUT - Switching clock output for external regulators. Floating O Digital Alternative programmable function: nRSTOUT_SOC - System reset or power on reset output (low = reset). Floating I Digital Alternative programmable function: nSLEEP1 or nSLEEP2, which are the sleep request signals for the device to go to lower power states (Active Low). Ground I Digital Alternative programmable function: WKUP1 or WKUP2, which are the wake- up request signals for the device to go to higher power states. Ground 11 SW_B1 — Analog BUCK1 switch node. Floating 12 PVIN_B1 — Power Power input for BUCK1. The separate power pins PVIN_Bx are not connected together internally – PVIN_Bx and VCCA pins must be connected together in the application and be locally bypassed. System supply 13 PGND — Ground Power ground for Buck regulators. Ground 14 PVIN_B2 — Power Power input for BUCK2. The separate power pins PVIN_Bx are not connected together internally – PVIN_Bx and VCCA pins must be connected together in the application and be locally bypassed. System supply 15 SW_B2 — Analog BUCK2 switch node. Floating 16 GPIO6 I/O Digital Primary function: General Purpose Input/Output signal. When configured as an output pin, it can be included as part of the power sequencer output signal to enable an external regulator. Input: Ground, Output: Floating I Digital Alternative programmable function: nERR_MCU - System error count down input signal from the MCU. Floating O Digital Alternative programmable function: SYNCCLKOUT - Switching clock output for external regulators. Floating O Digital Alternative programmable function: PGOOD - Programmable Power Good indication pin. Floating I Digital Alternative programmable function: nSLEEP1 or nSLEEP2, which are the sleep request signals for the device to go to lower power states (Active Low). Ground I Digital Alternative programmable function: WKUP1 or WKUP2, which are the wake- up request signals for the device to go to higher power states. Ground LP8762-Q1 SNVSCV7 – OCTOBER 2024 www.ti.com 6 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: LP8762-Q1 |
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