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LP87622-Q1 Datasheet(PDF) 7 Page - Texas Instruments

Part # LP87622-Q1
Description  LP8762-Q1 Four-Phase, 12A Buck Converter With Integrated Switches
PDF  21 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LP87622-Q1 Datasheet(HTML) 7 Page - Texas Instruments

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Table 5-1. Pin Functions (continued)
PIN
I/O
TYPE
DESCRIPTION
CONNECTION IF
NOT USED
NO.
NAME
17
GPIO7
I/O
Digital
Primary function: General Purpose Input/Output signal. When configured as
an output pin, it can be included as part of the power sequencer output signal
to enable an external regulator.
Input: Ground,
Output: Floating
I
Digital
Alternative programmable function: nERR_MCU - System error count down
input signal from the MCU.
Floating
O
Analog
Alternative programmable function: REFOUT - Buffered bandgap output.
Floating
I
Analog
Alternative programmable function: VMON1 - External voltage monitoring
input.
Ground
I
Digital
Alternative programmable function: nSLEEP1 or nSLEEP2, which are the
sleep request signals for the device to go to lower power states (Active Low).
Ground
I
Digital
Alternative programmable function: WKUP1 or WKUP2, which are the wake-
up request signals for the device to go to higher power states.
Ground
18
VCCA
—
Power
Supply voltage for internal LDO. VCCA and PVIN_Bx pins must be connected
together in the application and be locally bypassed.
System supply
19
AGND1
—
Ground
Ground
Ground
20
VOUT_LDO
—
Power
LDO regulator filter node. LDO is used for internal purposes.
—
21
AGND2
—
Ground
Ground
Ground
22
FB_B4
—
Analog
Output voltage feedback (positive) for BUCK4.Alternatively ground feedback
for BUCK3 in dual phase configuration.
Ground
23
FB_B3
—
Analog
Output voltage feedback (positive) for BUCK3.
Ground
24
VIO
—
Power
Supply voltage for selected digital outputs.
Ground
25
GPIO8
I/O
Digital
Primary function: General Purpose Input/Output signal. When configured as
an output pin, it can be included as part of the power sequencer output signal
to enable an external regulator.
Input: Ground,
Output: Floating
I/O
Digital
Alternative programmable function: SCLK_SPMI - Multi-PMIC SPMI serial
interface clock signal. This pin is an output pin for the master SPMI device,
and an input pin for the slave SPMI device.
Ground
I
Analog
Alternative programmable function: VMON2 - External voltage monitoring
input.
Ground
I
Digital
Alternative programmable function: nSLEEP1 or nSLEEP2, which are the
sleep request signals for the device to go to lower power states (Active Low).
Ground
I
Digital
Alternative programmable function: WKUP1 or WKUP2, which are the wake-
up request signals for the device to go to higher power states.
Ground
26
GPIO9
I/O
Digital
Primary function: General Purpose Input/Output signal. When configured as
an output pin, it can be included as part of the power sequencer output signal
to enable an external regulator.
Input: Ground,
Output: Floating
I/O
Digital
Alternative programmable function: SDATA_SPMI - Multi-PMIC SPMI serial
interface bidirectional data signal
Floating
O
Digital
Alternative programmable function: PGOOD - Programmable Power Good
indication pin.
Floating
I
Digital
Alternative programmable function: SYNCCLKIN - External switching clock
input for Buck regulators.
Ground
I
Digital
Alternative programmable function: nSLEEP1 or nSLEEP2, which are the
sleep request signals for the device to go to lower power states (Active Low).
Ground
I
Digital
Alternative programmable function: WKUP1 or WKUP2, which are the wake-
up request signals for the device to go to higher power states.
Ground
27
SW_B3
—
Analog
BUCK3 switch node.
Floating
28
PVIN_B3
—
Power
Power input for BUCK3. The separate power pins PVIN_Bx are not connected
together internally – PVIN_Bx and VCCA pins must be connected together in
the application and be locally bypassed.
System supply
www.ti.com
LP8762-Q1
SNVSCV7 – OCTOBER 2024
Copyright © 2024 Texas Instruments Incorporated
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7
Product Folder Links: LP8762-Q1



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