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ADS1262IPWR Datasheet(PDF) 39 Page - Texas Instruments

Part # ADS1262IPWR
Description  ADS126x 32-Bit, Precision, 38-kSPS, Analog-to-Digital Converter (ADC) with Programmable Gain Amplifier (PGA) and Voltage Reference
PDF  133 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ADS1262IPWR Datasheet(HTML) 39 Page - Texas Instruments

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9.3.7.1 PGA Differential Output Monitor
ADC1 incorporates a differential PGA output voltage monitor. This voltage monitor triggers an alarm when the
magnitude of the differential PGA output voltage is more positive than +105% or more negative than –105%
of full scale, but only during a conversion cycle. The alarm event, corresponding to the conversion cycle when
the alarm occurred, is set in the status byte (PGAD_ALM). For the next conversion, the alarm resets. If the
magnitude of differential output voltage is within the range of ±105% of full-scale range, the alarm remains reset.
The PGA differential monitor block diagram is shown in Figure 9-8.
+105% VREF
VOUTP
VOUTN
S
Q
Q
R
+
±
+
±
PGA
ADC
Digital
Filter
+
±
-105% VREF
Conversion
Start Reset
STATUS
DATA 1
DATA 2
DATA 3
DATA 4
PGAD_ALM
Bit 1 of STATUS byte
Latch
VREF Comparators
PGA Output
difference amplifier
Data Bytes
CRC/CHK
Figure 9-8. PGA Differential Overload Monitor
Figure 9-9 shows an example of the differential overrange monitor event.
Conversions (DRDY)
+ 105%
PGAD_ALM bit
Alarms latched during
conversion cycle
- 105%
Figure 9-9. PGA Differential Alarm
www.ti.com
ADS1262, ADS1263
SBAS661C – FEBRUARY 2015 – REVISED MAY 2021
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: ADS1262 ADS1263



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