| Electronic Components Datasheet Search |
|
STA510A Datasheet(PDF) 5 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STA510A Datasheet(HTML) 5 Page - STMicroelectronics |
|
5 / 21 page ![]() DocID11077 Rev 4 5/21 STA510A Pin description 21 19 GND-clean Logical ground 20 GND-Reg Ground for regulator VDD 21, 22 VDD 5-V regulator referred to ground 23 VL High logical state setting voltage 24 CONFIG Configuration 0: normal operation 1: single BTL (mono) mode, join the pins OUT1A to OUT1B and OUT2A to OUT2B (if IN1A is joined to IN1B and IN2A to IN2B) 25 PWRDN Standby (power down): 0: low power consumption mode 1: normal operation 26 TRI-STATE High impedance control: 0: all power amplifiers in high-impedance state 1: normal operation 27 FAULT(1) Fault advisor: 0: fault detected (short circuit or thermal) 1: normal operation 28 TH-WAR Thermal warning advisor: 0: junction temperature = 130 °C 1: normal operation 29 IN1A Input of half-bridge 1A 30 IN1B Input of half-bridge 1B 31 IN2A Input of half-bridge 2A 32 IN2B Input of half-bridge 2B 33, 34 VSS 5-V regulator referred to +VCC 35, 36 VCCSIGN Signal positive supply - EP Exposed pad up 1. The pin is open collector. To have a high logic value it needs to be pulled up by a resistor. Table 2. Pin list (continued) Pin Name Description |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |