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CDCLVD2102 Datasheet(PDF) 11 Page - Texas Instruments |
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CDCLVD2102 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 23 page ![]() LVDS Z = 50 W CDCLVD2102 100 W Z = 50 W LVDS Z = 50 W CDCLVD2102 100 nF Z = 50 W 100 W 100 nF LVDS Z = 50 W CDCLVD2102 100 W Z = 50 W LVDS Z = 50 W CDCLVD2102 Z = 50 W VAC_REF 50 W 50 W 100 nF 100 nF CDCLVD2102 www.ti.com SCAS904A – MAY 2010 – REVISED JUNE 2010 LVDS OUTPUT TERMINATION The proper LVDS termination for signal integrity over two 50 Ω lines is 100 Ω between the outputs on the receiver end. Either dc-coupled termination or ac-coupled termination can be used for LVDS outputs. It is recommended to place termination resister close to the receiver. If the receiver is internally biased to a voltage different than the output common mode voltage of the CDCLVD2102, ac-coupling should be used. If the LVDS receiver has internal 100 ohm termination, external termination must be omitted. Unused outputs can be left open without connecting any trace to the output pins. Figure 14. Output DC Termination Figure 15. Output AC Termination With Receiver Internally Biased INPUT TERMINATION The CDCLVD2102 inputs can be interfaced with LVDS, LVPECL, or LVCMOS drivers. LVDS Driver can be connected to CDCLVD2102 inputs with dc or ac coupling as shown Figure 16 and Figure 17, respectively. Figure 16. LVDS Clock Driver Connected to CDCLVD2102 Input (DC Coupled) Figure 17. LVDS Clock Driver Connected to CDCLVD2102 Input (AC Coupled) Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): CDCLVD2102 |
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