L9912 datasheet(62/84 Pages) STMICROELECTRONICS

62 / 84 page

SPI interface

L9912

62/84

DocID029639 Rev 2

13.4.2

The transmit/receive 24 bits message pair of a register write operation is composed as

follows:

Parity

The parity bit is computed to give an odd number of bit set to 1 in the 24 bits message.

Lock/Unlock

Some registers are write protected in order to prevent writing of undesired data; to write

such registers it is necessary to unlock them by writing the corresponding unlock bit in

After unlock the protected register it must be immediately written! Any read/write access to

any register resets the lock status.

13.4.3

GSW: global status word

At any read or write access, the first 9 upper bits of the returned 24 bits frame contain the

Global Status Word that summarizes some status bits:

Table 43. Register write operation

SPI TX message (MOSI)

SPI RX message (MISO)

Bit

Description

Bit

Description

1 (Write cmd)

23-15

GSW

22-18

Write Register ID

Parity

17-15

0 - Reserved

13-0

Previous register content

Parity (odd)

13-0

Data to write

Table 44. GSW: global status word

GSW

Bit

Frame

Bit

Reset

value

Description

PREV_SPI_FAILED

Prev. SPI Frame Discarded

LIN_EVENT

LIN event occurrence (LIN_PERM_DOM |

LIN_TXD_DOM | LIN_PERM_REC)

EXC_OC

Excitation overcurrent (EXTP_OC)

520

L/LHC_OC

L or LHC overcurrent (L_LS_OC or

L_HS_OC or LHC_LS_OC or

LHC_HS_OC)

DFM_PHASE_OUT_OC

DFM or phase out overcurrent (DFM_OC |

PHO_OC)

CP_LOW

Charge pump low (CP_LOW)

KEY_GEN

L_key OR LHC_key OR IGNT_KEY

L9912 Datasheet(PDF) 62 Page - STMicroelectronics

L9912 Datasheet(HTML) 62 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

Datasheet Download

Link URL