L9924L datasheet(22/84 Pages) STMICROELECTRONICS

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Electrical specifications

L9924L

22/84

DocID028840 Rev 3

When the device is in Active mode through any other available wake-up source, the

LIN/BSS wake-up can be restored.

Compatible to LIN 2.1 for Baud rates up to 20 kBit/s (Up to 100 kbit/s for Flash Mode).

Table 13. Electrical characteristics pin "LIN/BSS"

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

LIN/BSS receiver

1VTXDLOW

TxD input voltage

dominant level

1.3

2VTXDHIGH

Input voltage

recessive level

-2.3

VDD

3VTXDHYS

TxD input hysteresis

0.5

4ITXDPU

TxD input pull-up

current

Active mode

Pull-up to internal 3.3-V

power rail

V(TxD)=V(GND)

ITXDPU=-3.3 V/100 kΩ

-60

-33

-5

µA

ITXDPD

TxD input pull-down

current

Power Stand-by mode

V(TxD) = VDD

533

µA

6VRXDLOW

TxD output voltage

dominant level

I(RxD) = 2 mA

0.2

0.5

7VRXDHIGH

TxD output voltage

recessive level

I(RxD) = 2 mA

VDD-0.4V

8VThdom

Receiver threshold

voltage recessive to

dominant state

V(A+/B+) =12 V

0.4

V(A+/B+)

0.45

V(A+/B+)

0.5

V(A+/B+)

9VThrec

Receiver threshold

voltage dominant to

recessive state

V(A+/B+) =12 V

0.5

V(A+/B+)

0.55

V(A+/B+)

0.6

V(A+/B+)

VThhys

Receiver threshold

hysteresis

V(B+/A+) =12 V,

VThrec – VThdom

0.07

V(A+/B+)

0.1

V(A+/B+)

0.175

V(A+/B+)

VThcnt

Receiver tolerance

center value

V(B+/A+) =12 V,

(VThrec + VThdom)/2

0.475

V(A+/B+)

0.5

V(A+/B+)

0.525

V(A+/B+)

VThwkup

Receiver wakeup

threshold voltage

Wake-up by LIN/BSS active,

Power Stand-by mode,

recessive-to-dominant edge,

V(A+/B+)-3.5 V<40 V

V(A+/B+)

-3.5

V(A+/B+)

-2.5

V(A+/B+)

-1.5

tlinbus

Time for wakeup via

bus

Wake-up by LIN/BSS active,

Power Stand-by mode,

recessive-to-dominant edge

-5-

µs

LIN/BSS DC parameters

ILINDomSC

Transmitter input

current limit in

dominant state

V(TxD)=VTXDLOW

V(LIN/BSS) =V(A+/B+) =33 V

100

180

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