3V

3V

V

REF

3V

V

REF

3V

3V

3V

V

REF

V43

R

2.5k

SET1

W

A

+

I

REF1

+

-

+

U3

OPA333

R

2.5k

SET2

W

A

+

I

REF2

R

2k

1

W

R

100

ZERO

W

RWb

3W

RWc

4W

RWd

3W

RWa

3W

+

-

+

U2

OPA333

C

470nF

7

OUTF

GNDF

OUTS

GNDS

In

EN

U1REF3212

+

-

+

OPA3331OPA333

V

+

VRTD

VT25

VT+

VT-

Mon+

Mon-

RTD+

RTD-

EMU21RTD3

R

100k

GAIN

W

V

DIFF

T3BF256A

T1BF256A

UseBF861A

UseBF861A

G

S

RTDResistance

(Volts=Ohms)

Temp( C)

(Volts= C)

°

°

Pt100RTD

PGA112

MSP430

V

REF+

+

RG

V+

V-

Ref

_

2

1

8

3

6

7

5

4

U1 INA333

3V

RG

Out

22

INA333

SBOS445C – JULY 2008 – REVISED DECEMBER 2015

www.ti.com

Product Folder Links: INA333

Submit Documentation Feedback

Copyright © 2008–2015, Texas Instruments Incorporated

Device Support (continued)

To download a compressed file that contains the TINA-TI simulation file for this circuit, click the following link:

Log Circuit.

RWa, RWb, RWc, and RWd simulate wire resistance. These resistors are included to show the four-wire sense technique immunity to line

mismatches. This method assumes the use of a four-wire RTD.

Figure 42. Four-Wire, 3-V Conditioner for a PT100 RTD With Programmable Gain Acquisition System

To download a compressed file that contains the TINA-TI simulation file for this circuit, click the following link:

PT100 RTD.

11.2 Documentation Support

11.2.1 Related Documentation

For related documentation see the following:

•

Precision, Low-Noise, Rail-to-Rail Output, 36-V, Zero-Drift Operational Amplifiers, SBOS642

•

50μV VOS, 0.25μV/°C, 35μA CMOS OPERATIONAL AMPLIFIERS Zerø-Drift Series, SBOS432

•

4ppm/°C, 100μA, SOT23-6 SERIES VOLTAGE REFERENCE, SBVS058

•

Circuit Board Layout Techniques, SLOA089

11.3 Trademarks

All trademarks are the property of their respective owners.

11.4 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.