ISO7140FCCDBQ datasheet(17/36 Pages) TI2

17 / 36 page

ISO7131CC, ISO7140CC, ISO7140FCC, ISO7141CC, ISO7141FCC

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SLLSE83F – APRIL 2013 – REVISED JANUARY 2015

8.3 Feature Description

Table 1. Product Features

MAX DATA RATE

RATED

INPUT

DEFAULT

CHANNEL

PRODUCT

and

ISOLATION

THRESHOLD

OUTPUT

DIRECTION

INPUT FILTER

2 forward,

ISO7131CC

1 reverse

High

ISO7140CC

4 forward,

1.5-V TTL

50 Mbps,

4242 VPK

(1)

0 reverse

ISO7140FCC

(CMOS compatible)

Low

with noise filter integrated

ISO7141CC

High

3 forward,

1 reverse

ISO7141FCC

Low

(1)

See Regulatory Information for detailed Isolation Ratings.

8.3.1 Insulation and Safety-Related Specifications

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Maximum transient overvoltage per

VIOTM

DIN V VDE V 0884-10 (VDE V

4242

VPK

0884-10):2006-12

Maximum working voltage per DIN

VIORM

V VDE V 0884-10 (VDE V 0884-

566

VPK

10):2006-12

Isolation Voltage per UL 1577

VTEST = VISO, t = 60 sec (qualification)

2500

VISO

VRMS

VTEST = 1.2 * VISO, t = 1 sec (100% production)

3000

After Input/Output safety test subgroup 2/3,

VPR = VIORM x 1.2, t = 10 s,

679

Partial discharge < 5 pC

Input-to-output test voltage per DIN

Method a, After environmental tests subgroup 1,

VPR

V VDE V 0884-10 (VDE V 0884-

VPR = VIORM x 1.6, t = 10 s,

906

VPK

10):2006-12

Partial discharge < 5 pC

Method b1, 100% production test,

VPR = VIORM x 1.875, t = 1 s,

1061

Partial discharge < 5 pC

L(I01)

Minimum air gap (clearance)

Shortest terminal to terminal distance through air

3.7

Minimum external tracking

Shortest terminal to terminal distance across the

L(I02)

3.7

(creepage)

package surface

Minimum internal gap (internal

Distance through the insulation

0.014

clearance)

Pollution degree

Tracking resistance (comparative

CTI

DIN IEC 60112 / VDE 0303 Part 1

≥400

tracking index)

VIO = 500 V, TA = 25

>1012

RIO

(1)

Isolation Resistance, Input to Output

VIO = 500 V, 100

oC ≤ T

A ≤ TA max

>1011

CIO

(1)

Barrier capacitance, input to output

VI = 0.4 sin (2πft), f = 1 MHz

2.3

(2)

Input capacitance

VI = VCC/2 + 0.4 sin (2πft), f = 1 MHz, VCC = 5 V

2.8

(1)

All pins on each side of the barrier tied together creating a two-terminal device.

(2)

Measured from input pin to ground.

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Product Folder Links: ISO7131CC ISO7140CC ISO7140FCC ISO7141CC ISO7141FCC

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