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LM5102 Datasheet(PDF) 4 Page - Texas Instruments |
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LM5102 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 24 page ![]() LM5102 SNVS268B – MAY 2004 – REVISED DECEMBER 2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings (1) (2) MIN MAX UNIT VDD to VSS –0.3 18 V VHB to VHS –0.3 18 V LI or HI Inputs to VSS –0.3 VDD + 0.3 V LO Output –0.3 VDD + 0.3 V HO Output VHS – 0.3 VHB + 0.3 V VHS to VSS –1 100 V VHB to VSS 118 V RT1 and RT2 to VSS –0.3 5 V Junction Temperature 150 °C Storage Temperature Range –55 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions MIN MAX UNIT VDD 9 14 V HS –1 100 V HB VHS + 8 VHS + 14 V HS Slew Rate < 50 V/ns Junction Temperature –40 125 °C 6.4 Thermal Information LM5102 THERMAL METRIC(1) DGS DPR(2) UNIT 10 PINS 10 PINS RθJA Junction-to-ambient thermal resistance 165.3 37.9 RθJC(top) Junction-to-case (top) thermal resistance 58.9 38.1 RθJB Junction-to-board thermal resistance 54.4 14.9 °C/W ψJT Junction-to-top characterization parameter 6.2 0.4 ψJB Junction-to-board characterization parameter 83.6 15.2 RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 4.4 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953). (2) 4 layer board with Cu finished thickness 1.5 oz, 1 oz, 1 oz, 1.5 oz. Maximum die size used. 5x body length of Cu trace on PCB top. 50 x 50 mm ground and power planes embedded in PCB. See Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401). 4 Submit Documentation Feedback Copyright © 2004–2014, Texas Instruments Incorporated Product Folder Links: LM5102 |
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