OPA4316IPW datasheet(7/65 Pages) TI2

7 / 65 page

OPA316, OPA2316, OPA2316S, OPA4316

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SBOS703F – APRIL 2014 – REVISED OCTOBER 2016

Product Folder Links: OPA316 OPA2316 OPA2316S OPA4316

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Thermal Information: OPA316 (continued)

THERMAL METRIC(1)

OPA316

UNIT

DBV (SOT23)

DCK (SC70)

5 PINS

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

RθJC(bot)

Junction-to-case(bottom) thermal resistance(7)

N/A

°C/W

(1)

For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics (SPRA953).

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7).

(6)

The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7).

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

6.5 Thermal Information: OPA2316

THERMAL METRIC(1)

OPA2316

UNIT

D (SO)

DGK (MSOP)

DRG (DFN)

8 PINS

RθJA

Junction-to-ambient thermal resistance(2)

127.2

186.6

56.3

°C/W

RθJC(top)

Junction-to-case(top) thermal resistance(3)

71.6

78.8

72.2

°C/W

RθJB

Junction-to-board thermal resistance(4)

68.2

107.9

°C/W

ψJT

Junction-to-top characterization parameter(5)

15.5

2.3

°C/W

ψJB

Junction-to-board characterization parameter(6)

67.6

106.3

21.2

°C/W

RθJC(bot)

Junction-to-case(bottom) thermal resistance(7)

N/A

10.9

°C/W

(1)

For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics (SPRA953).

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7).

(6)

The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7).

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

6.6 Thermal Information: OPA2316S

THERMAL METRIC(1)

OPA2316S

UNIT

DGS (MSOP)

QFN (RUG)

10 PINS

RθJA

Junction-to-ambient thermal resistance(2)

189.6

158

°C/W

RθJC(top)

Junction-to-case(top) thermal resistance(3)

73.9

°C/W

RθJB

Junction-to-board thermal resistance(4)

110.7

°C/W

ψJT

Junction-to-top characterization parameter(5)

13.4

°C/W

ψJB

Junction-to-board characterization parameter(6)

109.1

°C/W

RθJC(bot)

Junction-to-case(bottom) thermal resistance(7)

N/A

°C/W

OPA4316IPW Datasheet(PDF) 7 Page - Texas Instruments

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