S-1701 datasheet(34/70 Pages) SII

34 / 70 page

HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR WITH RESET FUNCTION

S-1701 Series

Rev.2.4_00

Seiko Instruments Inc.

Selection of Input and Output Capacitors (CIN, CL)

The S-1701 Series requires an output capacitor between the VOUT and VSS pins for phase compensation.

A ceramic capacitor with a capacitance of 1.0

µF or more provides a stable operation in all temperature

ranges. When using an OS capacitor, tantalum capacitor, or aluminum electrolytic capacitor, a capacitor

with a capacitance of 1.0

µF or more and an ESR of 10 Ω or less is required.

The output overshoot and undershoot values, which are transient response characteristics, vary depending

on the output capacitor value. The required capacitance value for the input capacitor differs depending on

the application.

The recommended application values are CIN = 1.0

µF or more and CL = 1.0 µF or more, however, perform

thorough evaluation using the actual device, including evaluation of temperature characteristics.

Explanation of Terms

Regulator block

1. Low dropout voltage regulator

The low dropout voltage regulator is a voltage regulator whose dropout voltage is low due to its built-in

low on-resistance transistor.

2. Low ESR

A capacitor whose ESR (Equivalent Series Resistance) is low. The S-1701 Series enables use of a low

ESR capacitor, such as a ceramic capacitor, for the output-side capacitor (CL). A capacitor whose ESR is

Ω or less can be used.

3. Output voltage (VOUT)

The accuracy of the output voltage is ensured at

±1.0% under the specified conditions of fixed input

voltage

*1, fixed output current, and fixed temperature.

*1. Differs depending on the product.

Caution If the above conditions change, the output voltage value may vary and exceed the

accuracy range of the output voltage. Please see the electrical characteristics and

attached characteristics data for details.

4. Line regulation













•

∆

OUT

Indicates the dependency of the output voltage on the input voltage. That is, the values show how much

the output voltage changes due to a change in the input voltage with the output current remaining

unchanged.

5. Load regulation (

∆VOUT2)

Indicates the dependency of the output voltage on the output current. That is, the values show how

much the output voltage changes due to a change in the output current with the input voltage remaining

unchanged.

6. Dropout voltage (Vdrop)

Indicates the difference between the input voltage VIN1, which is the input voltage (VIN) at the point where

the output voltage has fallen to 98% of the output voltage value VOUT3 after VIN was gradually decreased

from VIN = VOUT(S)

+ 1.0 V, and the output voltage at that point (VOUT3 × 0.98).

Vdrop = VIN1

− (VOUT3 × 0.98)

S-1701 Datasheet(PDF) 34 Page - Seiko Instruments Inc

S-1701 Datasheet(HTML) 34 Page - Seiko Instruments Inc

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