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SN74LVC138ADE4 Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LVC138ADE4 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 40 page ![]() G2B G2A G1 C B A Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 Data Outputs Select Inputs Enable Inputs 1 2 3 6 4 5 15 14 13 12 11 10 9 7 Pin numbers shown are for the D, DB, DGV, J, NS, PW, RGY, and W packages. Copyright © 2016, Texas Instruments Incorporated Product Folder Sample & Buy Technical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN54LVC138A, SN74LVC138A SCAS291W – MARCH 1993 – REVISED OCTOBER 2016 SN74LVC138A 3-Line to 8-Line Decoders Demultiplexers 1 1 Features 1 • Operate From 1.65 V to 3.6 V • Inputs Accept Voltages to 5.5 V • Max tpd of 5.8 ns at 3.3 V • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C • Latch-Up Performance Exceeds 250 mA Per JESD 17 2 Applications • LED Displays • Servers • White Goods • Power Infrastructure • Building Automation • Factory Automation 3 Description The SN74LVC138A devices are designed for high- performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders minimize the effects of system decoding. When employed with high-speed memories using a fast enable circuit, delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SNx4LVC138A LCCC (20) 8.89 mm × 8.89 mm CDIP (16) 19.56 mm × 6.92 mm CFP (16) 10.30 mm × 6.73 mm SOIC (16) 9.90 mm × 3.91 mm SSOP (16) 6.20 mm × 5.30 mm TVSOP (16) 3.60 mm × 4.40 mm BGA MICROSTAR JUNIOR (20) 4.00 mm × 3.00 mm TSSOP (16) 5.00 mm × 4.40 mm UQFN (16) 2.60 mm × 1.80 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Logic Diagram (Positive Logic) |
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