SN65HVD255, SN65HVD256, SN65HVD257

www.ti.com

SLLSEA2D – DECEMBER 2011 – REVISED MAY 2015

9.4.5 Digital Inputs and Outputs

9.4.5.1 5-V VCC Only Devices (SN65HVD255 and SN65HVD257)

The 5-V VCC device is supplied by a single 5-V rail. The digital inputs are 5-V and 3.3-V compatible. The

SN65HVD255 and SN65HVD257 devices have a 5-V (VCC) level RXD output. TXD is internally pulled up to VCC

and S is internally pulled down to GND.

NOTE

TXD is internally pulled up to VCC and the S pin is internally pulled down to GND.

However, the internal bias may only put the device into a known state if the pins float. The

internal bias may be inadequate for system-level biasing. TXD pullup strength and CAN bit

timing require special consideration when the SN65HVD25x devices are used with an

open-drain TXD output on the CAN controller. An adequate external pullup resistor must

be used to ensure that the CAN controller output of the

μP maintains adequate bit timing

input to the SN65HVD25x devices.

9.4.5.2 5-V VCC With VRXD RXD Output Supply Devices (SN65HVD256)

This device is a 5-V VCC CAN transceiver with a separate supply for the RXD output, VRXD. The digital inputs are

5-V and 3.3-V compatible. The SN65HVD256 device has a VRXD level RXD output. TXD remains weakly pulled

up to VCC.

NOTE

On device versions with a VRXD supply that shifts the RXD output level, the input pins of

the device remain the same. TXD remains weakly pulled up to VCC internally. Thus, a

small IIH current flows if the TXD input is used below VCC levels.

9.4.5.3 5-V VCC with FAULT Open-Drain Output Device (SN65HVD257)

The SN65HVD257 device has a FAULT output pin (open-drain). FAULT must be pulled up to VCC or I/O supply

level through an external resistor.

NOTE

Because the FAULT output pin is open-drain, it actively pulls down when there is no fault

and becomes high-impedance when a fault condition is detected. An external pullup

resistor to the VCC or I/O supply of the system must be used to pull the pin high to indicate

a fault to the host microprocessor. The open-drain architecture makes the fault pin

compatible with 3.3-V and 5-V I/O-level systems. The pullup current, selected by the

pullup resistance value, must be as low as possible while achieving the desired voltage

level output in the system with margin against noise.

Copyright © 2011–2015, Texas Instruments Incorporated

Submit Documentation Feedback

21

Product Folder Links: SN65HVD255 SN65HVD256 SN65HVD257