THS4521 datasheet(32/58 Pages) TI2

32 / 58 page

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−9

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−3

100k

10M

100M

Frequency (Hz)

RF = 2 k

Ω

RF = 10 k

Ω

RF = 100 k

Ω

VOUT = 100 mVPP

G067

THS4531

SLOS358C – SEPTEMBER 2011 – REVISED APRIL 2020

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Application Circuits (continued)

9.2.7 Low Power Applications and the Effects of Resistor Values on Bandwidth

The THS4531 is designed for the nominal value of RF to be 2 kΩ. This gives excellent distortion performance,

maximum bandwidth, best flatness, and best pulse response. It also loads the amplifier. For example, in gain of 1

with RF = RG = 2 kΩ, RG to ground, and VOUT+ = 4 V, 1 mA of current will flow through the feedback path to

ground. In low power applications, it is desirable to reduce this current by increasing the gain setting resistors

values. Using larger value gain resistors has two primary side effects (other than lower power) due to their

interaction with the device and PCB parasitic capacitance:

1. Lowers the bandwidth.

2. Lowers the phase margin

a. This will cause peaking in the frequency response.

b. And will cause over shoot and ringing in the pulse response.

Figure 77 shows the small signal frequency response for gain of 1 with RF and RG equal to 2 kΩ, 10 kΩ, and 100

kΩ. The test was done with RL = 2 kΩ. Due to loading effects of RL, lower values may reduce the peaking, but

higher values will not have a significant effect.

As expected, larger value gain resistors cause lower bandwidth and peaking in the response (peaking in

frequency response is synonymous with overshoot and ringing in pulse response).

Figure 77. THS4531 Frequency Response with Various Gain Setting Resistor Values

9.2.8 Driving Capacitive Loads

The THS4531 is designed for a nominal capacitive load of 2 pF (differentially). When driving capacitive loads

greater than this, it is recommended to use small resisters (RO) in series with the output as close to the device as

possible. Without RO, capacitance on the output will interact with the output impedance of the amplifier causing

phase shift in the loop gain of the amplifier that will reduce the phase margin resulting in:

1. Peaking in the frequency response.

2. Overshoot, undershoot, and ringing in the time domain response with a pulse or square-wave signal.

3. May lead to instability or oscillation.

Inserting RO will compensate the phase shift and restore the phase margin, but it will also limit bandwidth. The

circuit shown in Figure 69 is used to test for best RO versus capacitive loads, CL, with a capacitance placed

differential across the VOUT+ and VOUT- along with 2 kΩ load resistor, and the output is measure with a differential

probe. Figure 78 shows the optimum values of RO versus capacitive loads, CL, and Figure 79 shows the

frequency response with various values. Performance is the same on both 2.7 V and 5 V supply.

THS4521 Datasheet(PDF) 32 Page - Texas Instruments

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