1

2

3

4

NodriversturnonwhenGSdataare '0'.

GSCLK

OUTn

(GSDATA=000h)

ON

OFF

ON

OFF

t=GSCLK

1

´

OUTn

(GSDATA=001h)

ON

OFF

t=GSCLK

2

´

ON

OFF

t=GSCLK

3

´

ON

OFF

ON

OFF

OUTn

(GSDATA=002h)

OUTn

(GSDATA=003h)

OUTn

(GSDATA=7FFFh)

OUTn

(GSDATA=8000h)

ON

OFF

ON

OFF

ON

OFF

OUTn

(GSDATA=FFFEh)

OUTn

(GSDATA=FFFFh)

OUTn

(GSDATA=8001h)

ON

OFF

OUTn

(GSDATA=FFFDh)

See(2)

(V

)

OUTnH

(V

)

OUTnL

(V

)

OUTnH

32768

32769

32770

BLANKBit

(Internal)

(1)

1

2

3 4

65535

65536

65537

(V

)

OUTnL

(V

)

OUTnH

(V

)

OUTnL

(V

)

OUTnH

(V

)

OUTnL

(V

)

OUTnH

(V

)

OUTnL

(V

)

OUTnH

(V

)

OUTnL

(V

)

OUTnH

(V

)

OUTnL

(V

)

OUTnH

(V

)

OUTnL

(V

)

OUTnH

(V

)

OUTnL

(V

)

OUTnH

(V

)

OUTnL

See(3)

See(4)

t=GSCLK

32768

´

t=GSCLK

65535

´

t=GSCLK

32769

´

t=GSCLK

65533

´

t=GSCLK

65534

´

t=GSCLK

32767

´

TLC5948A

SBVS192A – MARCH 2012 – REVISED DECEMBER 2012

www.ti.com

(1) The internal signal is generated when LAT inputs GS data with the display timing reset bit (TMGRST) set to '1'. This signal has the same

function as a BLANK = 1 pulse. Furthermore, the signal is generated at the 65,536th GSCLK when the auto display repeat bit (DSPRPT) is

set to '1'.

(2) The GS counter begins to count GSCLK pulses after the BLANK bit is set to '0' or when the LAT signal for a GS data write is input with

the display time reset mode enabled.

(3) OUTn turns on at the first GSCLK rising edge except when GS data are '0' after the BLANK bit is set to '0' or when the LAT signal for a

GS data write is input with the display time reset mode enabled.

(4) OUTn does not turn on again until BLANK is set to '1' once, except when the TMGRST or DSPRPT bits are '1'.

Figure 25. Conventional PWM Operation

Enhanced Spectrum (ES) PWM Control

In this PWM control, the total display period is divided into 128 display segments. The total display period is the

time from the first GS clock (GSCLK) to the 65,536th GSCLK input after the BLANK bit is set to '0'. Each display

segment has a maximum of 512 GSCLKs. The OUTn on-time changes, depending on the 16-bit GS data. Refer

to Table 6 for the sequence of information and to Figure 26 for the timing information.

22

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