VDD - Supply Voltage (V)

0.5

1.5

2.5

3.5

4.5

5.5

0

5

10

15

20

25

30

Rising

Falling

D004

21

TMUX1247

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SCDS399 – AUGUST 2019

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Typical Application (continued)

9.2.1.1 Design Requirements

This design example uses the parameters listed in Table 3.

Table 2. Design Parameters

PARAMETERS

VALUES

Supply (VDD)

5 V

Mux I/O signal range

0 V to VDD (Rail to Rail)

Control logic thresholds

1.8 V compatible (up to 5.5V)

9.2.1.2 Detailed Design Procedure

The application shown in Figure 17 demonstrates how to toggle between the DAC output and GND for control of

a power amplifier using a single control input. The DAC output is utilized to bias the gate of the power amplifier

and can be disconnected from the circuit using the select pin of the switch. The TMUX1247 can support 1.8-V

logic signals on the control input, allowing the device to interface with low logic controls of an FPGA or MCU. The

TMUX1247 can be operated without any external components except for the supply decoupling capacitors. The

select pin is recommended to have a weak pull-down or pull-up resistor to ensure the input is in a known state.

All inputs to the switch must fall within the recommend operating conditions of the TMUX1247 including signal

range and continuous current. For this design with a supply of 5 V the signal range can be 0 V to 5 V and the

max continuous current can be 30 mA.

9.2.1.3 Application Curve

A key parameter for this application is the transition time of the device. Faster transition time allows the system to

toggle between input sources at a faster rate and allows the output to settle to the final value. The TMUX1247

has a transition time that varies with supply voltage and is shown in Figure 18

TA = 25°C

Figure 18. Ttransition vs Supply Voltage