TMS320F28026DA datasheet(53/147 Pages) TI2

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9.5 VREG/BOR/POR

Although the core and I/O circuitry operate on two different voltages, these devices have an on-chip voltage

regulator (VREG) to generate the VDD voltage from the VDDIO supply. This eliminates the cost and space of a

second external regulator on an application board. Additionally, internal power-on reset (POR) and brown-out

reset (BOR) circuits monitor both the VDD and VDDIO rails during power-up and run mode.

9.5.1 On-chip Voltage Regulator (VREG)

A linear regulator generates the core voltage (VDD) from the VDDIO supply. Therefore, although capacitors are

required on each VDD pin to stabilize the generated voltage, power need not be supplied to these pins to operate

the device. Conversely, the VREG can be disabled, should power or redundancy be the primary concern of the

application.

9.5.1.1 Using the On-chip VREG

To use the on-chip VREG, the VREGENZ pin should be tied low and the appropriate recommended operating

voltage should be supplied to the VDDIO and VDDA pins. In this case, the VDD voltage needed by the core logic

will be generated by the VREG. Each VDD pin requires on the order of 1.2 μF (minimum) capacitance for proper

regulation of the VREG. These capacitors should be located as close as possible to the VDD pins. Driving an

external load with the internal VREG is not supported.

9.5.1.2 Disabling the On-chip VREG

To conserve power, it is also possible to disable the on-chip VREG and supply the core logic voltage to the VDD

pins with a more efficient external regulator. To enable this option, the VREGENZ pin must be tied high.

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TMS320F28027, TMS320F28027-Q1, TMS320F28027F, TMS320F28027F-Q1, TMS320F28026

TMS320F28026-Q1, TMS320F28026F, TMS320F28026F-Q1, TMS320F28023

TMS320F28023-Q1, TMS320F28022, TMS320F28021, TMS320F28020, TMS320F280200

SPRS523P – NOVEMBER 2008 – REVISED FEBRUARY 2021

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TMS320F28026DA Datasheet(PDF) 53 Page - Texas Instruments