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TMS320F28026DA Datasheet(PDF) 95 Page - Texas Instruments |
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TMS320F28026DA Datasheet(HTML) 95 Page - Texas Instruments |
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95 / 147 page ![]() 9.9.5 Inter-Integrated Circuit (I2C) The device contains one I2C Serial Port. Figure 9-34 shows how the I2C peripheral module interfaces within the device. The I2C module has the following features: • Compliance with the Philips Semiconductors I2C-bus specification (version 2.1): – Support for 1-bit to 8-bit format transfers – 7-bit and 10-bit addressing modes – General call – START byte mode – Support for multiple master-transmitters and slave-receivers – Support for multiple slave-transmitters and master-receivers – Combined master transmit/receive and receive/transmit mode – Data transfer rate of from 10 kbps up to 400 kbps (I2C Fast-mode rate) • One 4-word receive FIFO and one 4-word transmit FIFO • One interrupt that can be used by the CPU. This interrupt can be generated as a result of one of the following conditions: – Transmit-data ready – Receive-data ready – Register-access ready – No-acknowledgment received – Arbitration lost – Stop condition detected – Addressed as slave • An additional interrupt that can be used by the CPU when in FIFO mode • Module enable/disable capability • Free data format mode For more information on the I2C, see the Inter-Integrated Circuit Module (I2C) chapter in the TMS320F2802x,TMS320F2802xx Technical Reference Manual . www.ti.com TMS320F28027, TMS320F28027-Q1, TMS320F28027F, TMS320F28027F-Q1, TMS320F28026 TMS320F28026-Q1, TMS320F28026F, TMS320F28026F-Q1, TMS320F28023 TMS320F28023-Q1, TMS320F28022, TMS320F28021, TMS320F28020, TMS320F280200 SPRS523P – NOVEMBER 2008 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 95 Product Folder Links: TMS320F28027 TMS320F28027-Q1 TMS320F28027F TMS320F28027F-Q1 TMS320F28026 TMS320F28026-Q1 TMS320F28026F TMS320F28026F-Q1 TMS320F28023 TMS320F28023- Q1 TMS320F28022 TMS320F28021 TMS320F28020 TMS320F280200 |
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