TPS2000C datasheet(18/50 Pages) TI2

18 / 50 page

−2m

8m 10m 12m 14m 16m 18m 20m

−1

Output Voltage

FLT

−0.50

−0.25

0.00

0.25

0.50

0.75

1.00

1.25

1.50

1.75

2.00

Time (s)

Output Current

VIN = 5 V, COUT = 150 µF, RLOAD = 5 Ω, TPS2065C

G001

−2m

8m 10m 12m 14m 16m 18m 20m

−1

Output Voltage

FLT

−0.50

−0.25

0.00

0.25

0.50

0.75

1.00

1.25

1.50

1.75

2.00

Time (s)

Output Current

VIN = 5 V, COUT = 150 µF, RLOAD = 100 Ω, TPS2065C

G002

TPS2000C, TPS2001C, TPS2041C, TPS2051C, TPS2061C

TPS2065C, TPS2065C-2, TPS2068C, TPS2069C, TPS2069C-2

SLVSAU6H – JUNE 2011 – REVISED APRIL 2016

www.ti.com

Product Folder Links: TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C

TPS2069C TPS2069C-2

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Typical Application (continued)

All protection circuits such as the TPS20xxC and TPS20xxC-2 has the potential for input voltage overshoots and

output voltage undershoots.

Input voltage overshoots can be caused by either of two effects. The first cause is an abrupt application of input

voltage in conjunction with input power bus inductance and input capacitance when the IN terminal is high

impedance (before turnon). Theoretically, the peak voltage is 2× the applied. The second cause is due to the

abrupt reduction of output short-circuit current when the TPS20xxC and TPS20xxC-2 turns off and energy stored

in the input inductance drives the input voltage high. Input voltage droops may also occur with large load steps

and as the TPS20xxC and TPS20xxC-2 output is shorted. Applications with large input inductance (for example,

connecting the evaluation board to the bench power-supply through long cables) may require large input

capacitance reduce the voltage overshoot from exceeding the absolute maximum voltage of the device. The fast

current limit speed of the TPS20xxC and TPS20xxC-2 to hard output short circuits isolates the input bus from

faults. However, ceramic input capacitance in the range of 1 µF to 22 µF adjacent to the TPS20xxC and

TPS20xxC-2 input aids in both speeding the response time and limiting the transient seen on the input power

bus. Momentary input transients to 6.5 V are permitted.

Output voltage undershoot is caused by the inductance of the output power bus just after a short has occurred

and the TPS20xxC and TPS20xxC-2 has abruptly reduced OUT current. Energy stored in the inductance drives

the OUT voltage down and potentially negative as it discharges. Applications with large output inductance (such

as from a cable) benefit from use of a high-value output capacitor to control the voltage undershoot. When

implementing USB standard applications, a 120-µF minimum output capacitance is required. Typically a 150-µF

electrolytic capacitor is used, which is sufficient to control voltage undershoots. However, if the application does

not require 120 µF of capacitance, and there is potential to drive the output negative, then TI recommends a

minimum of 10-µF ceramic capacitance on the output. The voltage undershoot must be controlled to less than

1.5 V for 10 µs.

9.2.3 Application Curves

Figure 24. TPS2065C Output Rise / Fall 5

Figure 25. TPS2065C Output Rise / Fall 100

TPS2000C Datasheet(PDF) 18 Page - Texas Instruments

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