8 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification,

and TI does not warrant its accuracy or completeness. TI’s customers are responsible for

determining suitability of components for their purposes, as well as validating and testing their design

implementation to confirm system functionality.

8.1 Application Information

The following sections describe in detail proper device implementation, depending on the final application

requirements.

8.1.1 CRST Delay

The TPS35-Q1 features two options for setting the reset delay (tD): using a fixed timing and programming the

timing through an external capacitor.

8.1.1.1 Factory-Programmed watchdog Timing

Fixed watchdog timings are available using pinout C and D. Using these timings enables a high-precision, 10%

accurate watchdog timer tWD.

8.1.1.2 Adjustable Capacitor Timing

The TPS35-Q1 also offers programmable reset delay option when using pinout A and B. The TPS35-Q1 can be

programmed to have a desired reset delay by connecting a capacitor between CRST pin and GND. The typical

delay time resulting from a given external capacitance on the CRST pin can be calculated by Equation 3 , where

tD is the reset delay time in seconds and CCRST is the capacitance in farads.

tD (sec) = 4.95 × 106 × CCRST (F)

(3)

To minimize the difference between the calculated reset delay time and the actual reset delay time, use a use

a high-quality ceramic dielectric COG capacitor and minimize parasitic board capacitance around this pin. Table

8-1 lists the reset delay time ideal capacitor values for CCRST.

Table 8-1. Reset Delay Time for Common Ideal Capacitor Values

CCRST

RESET

DELAY TIME (tD)

UNIT

MIN (1)

TYP

MAX (1)

10nF

39.6

49.5

59.4

ms

100nF

396

495

594

ms

1μF

3960

4950

5940

ms

(1)

Minimum and maximum values are calculated using ideal capacitors.

8.1.2 Watchdog Timer Functionality

The TPS35-Q1 features two options for setting the watchdog timer (tWD ): using a fixed timing and programming

the timing through an external capacitor.

8.1.2.1 Factory-Programmed watchdog Timing

Fixed watchdog timings are available using pinout C and D. Using these timings enables a high-precision, 10%

accurate watchdog timer tWD.

8.1.2.2 Adjustable Capacitor Timings

Adjustable tWD timing is achievable by connecting a capacitor to the CWD pin. If this method is used, please

consult Equation 1 for calculating typical tWD values using ideal capacitors. Capacitor tolerances cause the

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TPS35-Q1

SLVSGE8B – NOVEMBER 2022 – REVISED AUGUST 2024

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