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TPS2552/3 Datasheet(PDF) 21 Page - Texas Instruments |
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TPS2552/3 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 31 page ![]() 11 Layout 11.1 Layout Guidelines • Place the 100-nF bypass capacitor near the IN and GND pins, and make the connections using a low- inductance trace. • Placing a high-value electrolytic capacitor and a 100-nF bypass capacitor on the output pin is recommended when large transient currents are expected on the output. • The traces routing the RILIM resistor to the device should be as short as possible to reduce parasitic effects on the current limit accuracy. • The PowerPAD should be directly connected to PCB ground plane using wide and short copper trace. 11.2 Layout Example Power Ground 1 2 3 4 6 5 7 8 OUT IN High Frequency Bypass Capacitor VIA to Power Ground Plane FAULT ILIM 8 9 10 Figure 11-1. TPS2559 Board Layout www.ti.com TPS2559 SLVSCL5A – JUNE 2014 – REVISED NOVEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TPS2559 |
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