Thermal

Shutdown

Current

Limit

UVLO

Bandgap

IN

EN

OUT

BIAS

12

TPS720

SBVS100E – JUNE 2008 – REVISED SEPTEMBER 2015

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7 Detailed Description

7.1 Overview

The TPS720 belongs to a family of new generation LDO regulators that use innovative circuitry to achieve ultra-

wide bandwidth and high loop gain, resulting in extremely high PSRR (up to 1 MHz) at very low headroom (VIN –

VOUT). The implementation of the BIAS pin on the TPS720 vastly improves efficiency of low VOUT applications by

allowing the use of a preregulated, low-voltage input supply. The TPS720 supports a novel feature in which the

output of the LDO regulates under light loads (<500 μA) when the IN pin is left floating. The light-load drive

current is sourced from VBIAS under this condition. This feature is particularly useful in power-saving applications

where the DC-DC converter connected to the IN pin is disabled but the LDO is still required to regulate the

voltage to a light load. These features, combined with low noise, low ground pin current, and ultra-small

packaging, make this device ideal for portable applications. This family of regulators offers sub-bandgap output

voltages, current limit and thermal protection, and is fully specified from –40°C to 125°C.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Internal Current Limit

The TPS720 internal current limits help protect the regulator during fault conditions. During current limit, the

output sources a fixed amount of current that is largely independent of output voltage. In such a case, the output

voltage is not regulated, and is VOUT = ILIMIT × RLOAD. The NMOS pass transistor dissipates (VIN – VOUT) × ILIMIT

until thermal shut down is triggered and the device is turned off. As the device cools down, it is turned on by the

internal thermal shutdown circuit. If the fault condition continues, the device cycles between current limit and

thermal shutdown. See the Thermal Considerations section for more details.

The NMOS pass element in the TPS720 has a built-in body diode that conducts current when the voltage at OUT

exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated,

external limiting to 5% of rated output current is recommended.

7.3.2 Inrush Current Limit

The TPS720 family of LDO regulators implement a novel inrush current limit circuit architecture: the current

drawn through the IN pin is limited to a finite value. This IINRUSHLIMIT charges the output to its final voltage. All the

current drawn through VIN goes to charge the output capacitance when the load is disconnected. The following

equation shows the inrush current limit performed by the circuit:

IINRUSHLIMIT(A) = COUT(μF) × 0.0454545 (V/μs) + ILOAD(A)

(1)