TUSB320 datasheet(19/36 Pages) TI2

19 / 36 page

Table 7-7. CSR Registers Bit Address and Description (continued)

ADDRESS

BIT(S)

BIT NAME

DESCRIPTION

ACCESS

0x0A

7:6

DEBOUNCE

The nominal amount of time the TUSB320 device

debounces the voltages on the CC pins.

00 – 133 ms (default)

01 – 116 ms

10 – 151 ms

11 – 168 ms

5:4

MODE_SELECT

This register can be written to set the TUSB320 device

mode operation. The ADDR pin must be set to I2C

mode. If the default is maintained, the TUSB320 device

operates according to the PORT pin levels and modes.

The MODE_SELECT can only be changed when in the

unattached state.

00 – Maintain mode according to PORT pin selection

(default)

01 – UFP mode (unattached.SNK)

10 – DFP mode (unattached.SRC)

11 – DRP mode (start from unattached.SNK)

I2C_SOFT_RESET

This resets the digital logic. The bit is self-clearing. A write

of 1 starts the reset. The following registers maybe affected

after setting this bit:

CURRENT_MODE_DETECT

ACTIVE_CABLE_DETECTION

ACCESSORY_CONNECTED

ATTACHED_STATE

CABLE_DIR

RSU

2:1

Reserved

0x45

7:3

Reserved

DISABLE_RD_RP

When this field is set, Rd and Rp are disabled.

0 – Normal operation (default)

1 – Disable Rd and Rp

1:0

Reserved. For TI internal use only. Do not change default

value.

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TUSB320, TUSB320I

SLLSEN9F – MAY 2015 – REVISED MARCH 2022

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