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TDA2SA Datasheet(PDF) 19 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 19 Page - Texas Instruments |
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19 / 427 page  Copyright © 2015–2019, Texas Instruments Incorporated Terminal Configuration and Functions Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF 19 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF www.ti.com SPRS951F – DECEMBER 2015 – REVISED MAY 2019 Table 4-2. Ball Characteristics(1) (continued) BALL NUMBER [1] BALL NAME [2] SIGNAL NAME [3] Hxx/LFx [4] MUXMODE [5] TYPE [6] BALL RESET STATE [7] BALL RESET REL. STATE [8] BALL RESET REL. MUXMODE [9] I/O VOLTAGE VALUE [10] POWER [11] HYS [12] BUFFER TYPE [13] PULL UP/DOWN TYPE [14] DSIS [15] J25 ddr2_d13 ddr2_d13 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy J26 ddr2_d14 ddr2_d14 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy J24 ddr2_d15 ddr2_d15 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy L22 ddr2_d16 ddr2_d16 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy K20 ddr2_d17 ddr2_d17 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy K21 ddr2_d18 ddr2_d18 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy L23 ddr2_d19 ddr2_d19 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy L24 ddr2_d20 ddr2_d20 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy J23 ddr2_d21 ddr2_d21 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy K22 ddr2_d22 ddr2_d22 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy J20 ddr2_d23 ddr2_d23 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy L27 ddr2_d24 ddr2_d24 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy L26 ddr2_d25 ddr2_d25 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy L25 ddr2_d26 ddr2_d26 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy L28 ddr2_d27 ddr2_d27 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy M23 ddr2_d28 ddr2_d28 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy M24 ddr2_d29 ddr2_d29 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy M25 ddr2_d30 ddr2_d30 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy M26 ddr2_d31 ddr2_d31 0 IO PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy F28 ddr2_dqm0 ddr2_dqm0 0 O PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy G24 ddr2_dqm1 ddr2_dqm1 0 O PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy K23 ddr2_dqm2 ddr2_dqm2 0 O PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy M22 ddr2_dqm3 ddr2_dqm3 0 O PU PU 1.35/1.5/1.8 vdds_ddr2 No LVCMOS DDR Pux/PDy |
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