MP5026

– 16V, 20A, 2.8mΩ RDS(ON), HOT-SWAP INTELLI-FUSE SOLUTION

MP5026 Rev. 1.0

MonolithicPower.com

21

7/5/2023

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PCB Layout Guidelines

Efficient

PCB

layout

is

critical

for

stable

performance.

A

4-layer

layout

is

strongly

recommended

for

improved

thermal

performance. For the best results, refer to

Figure 12 and follow the guidelines below:

1.

Place the MP5026

close to the board’s

input

connector

to

minimize

trace

inductance.

2.

Place a small input capacitor (e.g. 100nF)

close to the VIN and GND pins to minimize

transients

on

the

input

supply

line.

(Transients of several volts can occur

easily if ILOAD is shut off.)

3.

Place a 1µF capacitor as close to VDD33

as possible.

4.

Keep the high-current path between the

board’s input and load close to and in

parallel with the return path to minimize

loop inductance.

5.

Connect the analog signal ground (AGND)

plane to the PCB

’s power ground (PGND)

planes at a single point.

6.

Place multiple vias on the board for

improved thermal performance:

a. Place

≥6 vias on the bottom of the VIN

pad.

b. Place

≥3 vias on the bottom of the GND

pad.

c. Place

≥6 vias close to the MP5026’s

VIN and VOUT pads.

d. Place

≥3 vias close to the pads of the

input TVS.

e. Place

≥3 vias close to the pads of the

output Schottky diodes.

VIN

VIN

VIN

VIN

VOUT

VOUT

GND

OV

EN/UV

SS

PG

VCC

VOUT Copper

VIN Copper

R3

Components on Top Layer

R3

Components on Bottom Layer

VIN Via

VOUT Via

PGND

AGND

Signal Via

VIN

VOUT

PGND

PGND

AGND

VIN

GND

1

2

3

4

5

6

18

17

16

15

14

13

25

26

PGND Via

Figure 12: Recommended PCB Layout

VIN TVS Diode PN: SMDJ12A

VOUT Diode PN: B330A