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TH8061 Datasheet(PDF) 28 Page - Melexis Microelectronic Systems |
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TH8061 Datasheet(HTML) 28 Page - Melexis Microelectronic Systems |
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28 / 36 page ![]() TH8061 Voltage Regulator with integrated LIN Transceiver 5. Opera ing during Disturbance t 5.1 Operating without VSUP or GND The absence of VSUP or GND connection will not influence or disturb the communication between other bus nodes. No reverse supply of the IC can appear if without GND or VSUP connection the BUS pin is on VBAT level. 5.2 Short Circuit BUS against VBAT The reaction of the IC depends on the send state of the transceiver: - Recessive LIN bus is blocked, no influence to the TH8061 - Dominant Current limitation, thermal shut down of TH8061 if power dissipation will make an overrun of TJ 5.3 Short Circuit BUS against GND LIN bus is blocked. No influence on the TH8061. 5.4 Short Circuit TxD against GND The LIN transceiver is permanently in the dominant state, that means the whole LIN bus. This state can only be detected from the LIN controller. In this case the controller must switch off the LIN node via the EN input of the TH8061. A thermal shut down of TH8061 will appear if the power dissipation and will make an overrun of TJ. 5.5 TxD open The internal pull-up resistor forces the LIN node to the recessive state. The communication between the other bus-nodes will not be disturbed. 5.6 Short Circuit VCC against GND The VCC pin is protected via a current limitation. This state is comparable with the behaviour in the sleep mode. 5.7 Overload of VCC Thermal switch off The power dissipation is increasing if the load current is between IVCC_max and ILVCC. If the max junction temperature of >155°C is reached, the IC will be switched off. The voltage regulator will also be switched off and a reset signal is forced. Over current If the current limitation is active the voltage on VCC drops down. If this voltage under-runs the threshold VRES, a reset will be forced. 5.8 Undervoltage VSUP, VCC The reset unit ensures the correct behaviour of the driver during under-voltage. The BUS pin generates the recessive state if VCC < VMRes. The inputs EN and TxD have pull-up and pull-down characteristics. If VMRes ≤ VCC ≤ 4.5V the TxD signal is transmitted to the bus. The receive mode is also active. 5.9 Short circuit RxD, RESET against GND or VCC Both outputs are short circuit proof to VCC and ground. TH8061 – Datasheet Page 28 of 36 3901008061 June 2004 Rev 007 |
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