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24LC024 Datasheet(PDF) 9 Page - Microchip Technology

Part # 24LC024
Description  2-Kbit I2C Serial EEPROM
PDF  41 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

24LC024 Datasheet(HTML) 9 Page - Microchip Technology

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 2007-2022 Microchip Technology Inc. and its subsidiaries
DS20001210Q-page 9
24AA024/24LC024/24AA025/24LC025
5.0
DEVICE ADDRESSING
A control byte is the first byte received following the
Start condition from the host device. The control byte
consists of a 4-bit control code. For the 24AA024/
24LC024/24AA025/24LC025, this is set as ‘1010’
binary for read and write operations. The next three bits
of the control byte are the Chip Select bits (A2, A1, A0).
The Chip Select bits allow the use of up to eight
24AA024/24LC024/24AA025/24LC025 devices on the
same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1 and A0 pins for the device to respond. These bits
are, in effect, the three Most Significant bits (MSb) of
the word address. The combination of the 4-bit control
code and the next three bits are called the client
address.
For the SOT-23 package, the A2 address pin is not
available. During device addressing, the A2 Chip
Select bit should be set to ‘0’.
The last bit of the control byte is the Read/Write (R/W)
bit and it defines the operation to be performed. When
set to a one, a read operation is selected. When set to
a zero, a write operation is selected. The next byte
received defines the address of the first data byte
(Figure 5-2). Following the Start condition, the
24AA024/24LC024/24AA025/24LC025 monitors the
SDA bus checking the control byte being transmitted.
Upon receiving a valid client address and the R/W bit,
the client device outputs an Acknowledge signal on the
SDA line. Depending on the state of the R/W bit, the
24AA024/24LC024/24AA025/24LC025 will select a
read or write operation.
FIGURE 5-1:
CONTROL BYTE FORMAT
5.1
Contiguous Addressing Across
Multiple Devices
The Chip Select bits A2, A1 and A0 can be used to
expand the contiguous address space for up to
16 Kbits by adding up to eight 24AA024/24LC024/
24AA025/24LC025 devices on the same bus. In this
case, software can use A0 of the control byte as
address bit A8; A1 as address bit A9; and A2 as
address bit A10. It is not possible to sequentially read
across device boundaries.
For the SOT-23 package, up to four 24AA025/24LC025
devices can be added for up to 8 Kbits of address
space. In this case, software can use A0 of the control
byte as address bit A8, and A1 as address bit A9. It is
not possible to sequentially read across device
boundaries.
FIGURE 5-2:
ADDRESS SEQUENCE BIT ASSIGNMENTS
10
1
0
A2
A1
A0
SACK
R/W
Control Code
Chip Select
Bits
Client Address
Acknowledge Bit
Start Bit
Read/Write Bit
1
•
010
R/W
A
0
••
•
•
•
Control Byte
Word Address Byte
Control
Code
Chip
Select
bits
A
2
A
1
A
A
0
7



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