LTC1067CS datasheet(15/20 Pages) AD

15 / 20 page

LTC1067/LTC1067-50

APPLICATIONS INFORMATION

Figure 14 illustrates how a resistor adjusts the AGND

voltage for use with a 3V/3.3V powered ADC with a full-

scale input of 2.048V. As in the previous circuit, the

resistor value was chosen carefully to assure that a 2.048V

input signal to the filter yields a full-scale reading from the

ADC and a 0V input signal gives the lowest possible value.

For this application, the power supply must be above 2.7V

for an LTC1067-50 filter and above 3V for an LTC1067

filter.

Figure 14. Power and AGND Connections for

3V/3.3V ADC with 2.048V Full Scale

0.1

µF

1067 F14

33.2k

LTC1067

LTC1067-50

V+

LPA

BPA

HPA/NA

INV A

CLK

AGND

V–

LPB

BPB

HPB/NB

INV B

3V TO 3.6V

(LTC1067)

2.7V TO 3.6V

(LTC1067-50)

µF

Semi-Custom Filter Program

Linear Technology has in place a program to deliver fully

integrated filters, custom designed for any specified appli-

cation. These semi-custom filters are based on an existing

universal filter product with integrated, on-chip resistors.

The final filter is then tested to the exact parameters

defined for the application. The final result is a fully

integrated, accurately tested solution in a smaller pack-

age. For the LTC1067 or LTC1067-50 parts, a semi-

custom filter comes in the SO-8 package and requires only

a clock and a decoupling capacitor. For more details on the

semi-custom filter program, contact Linear Technology’s

marketing department.

Demonstration Board

There is a demonstration board available for the LTC1067/

LTC1067-50. Demonstration board 150A has the LTC1067

part installed and the board 150B has the LTC1067-50

installed. The schematic for the board is shown in Figure

15 and the assembly drawing is shown in Figure 16. To

obtain a demonstration board, call your local representa-

tive or Linear Technology’s marketing department.

The demonstration board has all integrated circuits, con-

nectors and decoupling capacitors installed. The board is

ready to be configured with the appropriate resistors and

jumper connections.

There are two sets of power supply connections. One is for

the LTC1067/LTC1067-50 and the other is for the buffer-

ing op amp on the board. Having separate connections

gives the board the most flexibility. The two sets of

supplies can be connected together if a common supply is

desired.

When configuring the board for split supply operation, a

jumper wire must be installed in the JPAGND position.

This connects the AGND pin of the device to the ground

plane of the board. The JPVNEG jumper must be left open.

The power supply is then connected to V +, V – and GND

turrets (all of the GND turrets on the board are the same).

For single supply operation, insert a wire in the JPVNEG

jumper and leave the JPAGND jumper open. This connects

the V – pin to the board’s ground plane. The JPAGND

jumper must be left open so that the on-chip resistor

network can set the AGND potential at the midpoint of the

supply. Connect the power supply to V + and any GND

turret. The V – turret can be left open or shorted to the

adjacent GND turret. If the buffering op amp is run on the

same single voltage supply, the VOA+ turret and the V +

turrets must be connected together and the VOA – turret

must be shorted to the adjacent GND turret.

The J1 BNC connector is the clock input. There is a 200

Ω

series resistor connected between the connector and the

CLK pin of the part. This resistor, coupled with the CLK

pin’s input capacitance, slows down the rise and fall times

of the clock signal and decreases high frequency coupling.

The clock input is not terminated to 50

Ω or 75Ω. An

external terminator should be used.

Jumpers JP51 and JP61 are connected in parallel with

R51 and R61 respectively. Jumper JP51 connects the LPA

pin of the part with the SA pin. This can be used for

operating modes 1 or 2. Alternatively, a 0

Ω resistor in the

R51 position fulfills the same requirement. The JP61

jumper connects the SA pin of the part to the AGND pin.

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