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LT1362 Datasheet(PDF) 5 Page - Analog Devices

Part # LT1362
Description  1MHz/500kHz Continuous Time, Low Noise, Lowpass Elliptic Filter
PDF  8 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LT1362 Datasheet(HTML) 5 Page - Analog Devices

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LTC1560-1
sn15601 15601fs
PIN FUNCTIONS
GND (Pins 1, 3): Analog Ground Pins. The quality of the
analog ground can affect the filter performance. For dual
supply operation the analog ground pin should be con-
nected to an analog ground plane surrounding the pack-
age. The analog ground plane should be connected to a
digital ground plane (if any) at a single point. For single
supply operation, the analog ground pin should be biased
at one-half the power supply across the device (see
Figure 1) and the analog ground plane should then be
connected to V – (Pin 4).
VIN (Pin 2): The filter input is internally connected to the
inverting input of a high frequency op amp through an 8k
resistor.
V –, V + (Pins 4, 6): Power Supply Pins. The negative and
positive power supply (Pins 4 and 6 respectively) should
be decoupled with a 0.1
µF capacitor in parallel with a
0.01
µF. Both capacitors should be types designed for
decoupling video frequencies and they should be placed
as close as possible to the power supply pins of the filter.
Parallel routing of high frequency signal paths should be
avoided; they will couple into the device’s power supply
pins and cause gain inaccuracy and stopband degrada-
tion. The power supplies can be applied in any order, that
is, the positive supply can be applied before the negative
supply and vice versa. Switching power supplies are not
recommended.
0.5fC/fC (Pin 5): By tying Pin 5 high the filter cutoff
frequency is internally programmed for 500kHz. By tying
Pin 5 low the cutoff frequency will switch to 1MHz. Pin 5
should not be left floating. The logic threshold of Pin 5 is
approximately 0.4 times the total power supply across the
device.
SHDN (Pin 7): Shutdown. Under normal operating condi-
tions, Pin 7 should be shorted either to the analog ground
(Pin 1) or to V – (Pin 4). If Pin 7 is pulled high to V +, the filter
operation will stop and the IC will be placed in a power
saving mode. The power supply current will then be
reduced to 1mA. For a
±5V supply, the logic threshold of
Pin 7 is 2.5V. Pin 7 is internally connected to the analog
ground pin via a 50k resistor.
VOUT (Pin 8): The filter output pin can sink or source 1mA.
The total harmonic distortion of the filter will degrade
when driving coaxial cables or loads less than 10k without
an output buffer.
Figure 1. Connections for Single Supply Operation
V +
1560-1 F01
VIN
VOUT
0.01
µF
0.1
µF
0.01
µF
1
µF
10k
10k
GND OR V+
ANALOG GROUND PLANE
SYSTEM GROUND
DIGITAL GROUND
PLANE
GND
V –
V +
GND
VIN
1
4
3
2
8
5
6
7
VOUT
SHDN
0.5fC/fC
LTC1560-1



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