LT1787 datasheet(13/24 Pages) AD

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LT6118

6118f

For more information www.linear.com/LT6118

applicaTions inForMaTion

can be multiplied by the

θJA value, 163°C/W for the MS8

package or 64°C/W for the DFN, to find the maximum

expecteddietemperature.Properheatsinkingandthermal

relief should be used to ensure that the die temperature

does not exceed the maximum rating.

LE Pin

The LE pin is used to enable the comparator output latch.

When the LE pin is high, the output latch is enabled and the

comparator output will stay low once it is tripped. When

LE is low, the comparator output latch is disabled and

the comparator operates transparently. To continuously

operate the comparator transparently, the LE pin should

be grounded. Do not leave the LE pin floating.

Power-On Reset

During startup the state of the comparator output can-

not be guaranteed. To guarantee the correct state of the

comparator output on startup, a power-on reset (POR) is

required. A POR can be implemented by holding the LE pin

low until the LT6118 is in such a state that the compara-

tor output is stable. This can be achieved by using an RC

network between the LE, V+ and GND as shown in Figure 6.

When power is applied to the LT6118, the RC network

causes the voltage on the LE pin to remain below the VIL

(0.5V) threshold long enough for the comparator output

to settle into the correct state. The LE pin should remain

below 0.5V for at least 100µs after power up in order to

guarantee a valid comparator output. The RC value can

be determined with the following equation:

V+

V+ – 0.5V









; t

≥100µs

Figure 5. Gain Error vs Resistor Tolerance

RESISTOR TOLERANCE (%)

0.01

0.1

6118 F05

RIN = 100

RIN = 1k

of the maximum gain error which can be expected versus

the external resistor tolerance.

Output Current Limitations Due to Power Dissipation

The LT6118 can deliver a continuous current of 1mA to the

OUTA pin. This current flows through RIN and enters the

current sense amplifier via the SENSEHI pin. The power

dissipated in the LT6118 due to the output signal is:

POUT = (VSENSEHI – VOUTA) • IOUTA

Since VSENSEHI ≈ V+, POUTA ≈ (V+ – VOUTA) • IOUTA

There is also power dissipated due to the quiescent power

supply current:

PS = IS • V+

The comparator output current flows into the comparator

output pin and out of the V– pin. The power dissipated in

the LT6118 due to the comparator is often insignificant

and can be calculated as follows:

POUTC = (VOUTC – V–) • IOUTC

The total power dissipated is the sum of these

dissipations:

PTOTAL = POUTA + POUTC + PS

At maximum supply and maximum output currents, the

total power dissipation can exceed 150mW. This will cause

significant heating of the LT6118 die. In order to prevent

damage to the LT6118, the maximum expected dissipa-

tion in each application should be calculated. This number

Figure 6. RC Network Achieves Power-On Reset

6118 F06

VLE

V+

LT6118

110k

60V

0.1µF

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