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FT232BM Datasheet(PDF) 13 Page - Future Technology Devices International Ltd. |
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FT232BM Datasheet(HTML) 13 Page - Future Technology Devices International Ltd. |
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13 / 54 page ![]() DS2232C Version 1.2 © Future Technology Devices International Ltd. 2004 Page 13 of 54 FT2232C Dual USB UART / FIFO I.C. Channel B Pin# Generic Pin Name Pin Definitions by Chip Mode **Note 2 232 UART Mode 245 FIFO Mode CPU FIFO Interface Mode Enhanced Asynchronous and Synchronous Bit-Bang Modes MPSSE **Note 4 MCU Host Bus Emulation Mode **Note 5 Fast Opto- Isolated Serial Mode 40 BDBUS0 TXD D0 D0 D0 AD8 FSDI 39 BDBUS1 RXD D1 D1 D1 AD9 FSCLK 38 BDBUS2 RTS# D2 D2 D2 AD10 FSDO 37 BDBUS3 CTS# D3 D3 D3 AD11 FSCTS 36 BDBUS4 DTR# D4 D4 D4 AD12 **Note 3 35 BDBUS5 DSR# D5 D5 D5 AD13 33 BDBUS6 DCD# D6 D6 D6 AD14 32 BDBUS7 RI# D7 D7 D7 AD15 30 BCBUS0 TXDEN RXF# CS# WR# **Note 9 CS# 29 BCBUS1 SLEEP# TXE# A0 RD# **Note 9 ALE 28 BCBUS2 RXLED# RD# RD# WR# **Note 7 RD# 27 BCBUS3 TXLED# WR WR# RD# **Note 7 WR# 26 SI/WUB SI/WUB SI/WUB **Note 8 SI/WUB **Note 8 **Note 8 SI/WUB **Note 2 : 232 UART, 245 FIFO, CPU FIFO Interface, and Fast Opto-Isolated modes are enabled in the external EEPROM. Enhanced Asynchronous and Synchronous Bit-Bang modes, MPSSE, and MCU Host Bus Emulation modes are enabled using the driver command set bit mode. See Section 5.2 for details. **Note 3 : Channel A can be configured in another IO mode if channel B is in Fast Opto-Isolated Serial Mode. If both Channel A and Channel B are in Fast Opto-Isolated Serial Mode all of the IO will be on Channel B. **Note 4 : MPSSE is Channel A only. **Note 5 : MCU Host Bus Emulation requires both Channels. **Note 6 : The Bit-Bang Mode (synchronous and asynchronous) WR# and RD# strobes are on these pins when the main Channel mode is 245 FIFO, CPU FIFO interface, or Fast Opto-Isolated Serial Modes. **Note 7 : The Bit-Bang Mode (synchronous and asynchronous) WR# and RD# strobes are on these pins when the main Channel mode is 232 UART Mode. **Note 8 : SI/WU is not available in these modes. **Note 9 : The Bit-Bang Mode (synchronous and asynchronous) WR# and RD# strobes are on these pins when the main Channel mode is 245 FIFO, CPU FIFO interface. Bit-Bang mode is not available on Channel B when Fast Opto- Isolated Serial Mode is enabled. |
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