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MAX97003 Datasheet(PDF) 21 Page - Analog Devices |
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MAX97003 Datasheet(HTML) 21 Page - Analog Devices |
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21 / 48 page ![]() ���������������������������������������������������������������� Maxim Integrated Products 21 MAX97003 High-Efficiency, Low-Noise Audio Subsystem Bump Configuration Bump Description BUMP NAME FUNCTION A1 C1N Charge-Pump Flying Capacitor Negative Terminal. Connect a 1FF capacitor between C1P and C1N. A2 C1P Charge-Pump Flying Capacitor Positive Terminal. Connect a 1FF capacitor between C1P and C1N. A3 CPVSS Headphone Amplifier Negative Power Supply. Bypass with a 1FF capacitor to PGND. A4 HPR Headphone Amplifier Right Output A5 HPL Headphone Amplifier Left Output B1 GND Analog Ground B2 SCL Serial Clock Input. Connect a pullup resistor from SCL to the I2C bus supply. B3 CPVDD Headphone Amplifier Positive Power Supply. Bypass with a 1FF capacitor to PGND. B4 HPSNS Headphone Ground Sense. Connect to the headset jack’s ground terminal. B5 BIAS Common-Mode Bias. Bypass to GND with a 1FF capacitor. C1 PVDD Speaker Amplifier Power Supply. Bypass with a 0.1FF and a 10FF capacitor to PGND. C2 SDA Serial-Data Input/Output. Connect a pullup resistor from SDA to the I2C bus supply. C3 VDD Headphone Amplifier Supply. Bypass with a 0.1FF and a 10FF capacitor to GND. C4 INB1 Input B1. Left or negative input. C5 INB2 Input B2. Right or positive input. D1 SPKP Positive Speaker Output D2 SPKN Negative Speaker Output D3 PGND Speaker Amplifier Ground and Charge-Pump Ground D4 INA1 Input A1. Left or negative input. D5 INA2 Input A2. Right or positive input. C1P CPVSS HPR C1N 23 4 1 A SCL CPVDD HPSNS GND B SDA VDD TOP VIEW (BUMP SIDE DOWN) WLP HPL 5 BIAS INB2 PVDD C SPKN PGND INA1 INA2 SPKP D + INB1 MAX97003 |
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